[Object] Effectively perform data communication [Solving Means] A communication device includes: a LINK that generates a first output signal on a basis of a first external signal from a first external device, outputs the first output signal to a second external device, generates a second output signal on a basis of a second external signal from the second external device, and outputs the second output signal to the first external device, in which each of the first output signal and the second external signal includes command information indicating content of a command transmitted from the first external device, final-destination-device-identification-information for identifying a final destination device of data transmitted from the first external device, internal address information indicating an internal address of the final destination device, data length information indicating a length of the data transmitted from the first external device, and data-end-position-information indicating an end position of the data transmitted from the first external device.

A docking station and a control method thereof are provided. The docking station includes a first USB interface, a second USB interface, a video signal output terminal, a microcontroller, a first signal multiplexer, a second signal multiplexer, a video signal processor, and a video signal converter. The microcontroller determines whether the first USB interface or the second USB interface is connected to an electronic device. When the first USB interface is connected to the electronic device, the microcontroller sets the first USB interface as an uplink port. The uplink port receives a signal from the electronic device, and selects and outputs a video signal through the signal. The video signal processor is configured to receive and process the video signal. The video signal converter converts the video signal into a video output signal that is capable of being output to the video signal output terminal for playing.

A firmware protection module implements a hybrid firmware protection scheme on a computing device. The firmware protection module intercepts a message from a processor to a memory of the computing device. The message includes a command and an address in the memory corresponding to a firmware module stored in the module. The firmware protection module determines whether the command in the message is prohibited and whether the address in the message is protected. Responsive to a determination that the command is prohibited and the address is protected, the firmware protection module prevents at least a portion of the message from reaching the memory.

A method for filtering communication data arriving from a communication partner via a communication connection, which provides access to at least one storage means of a receiving data processing device having at least one computation unit, in the data processing device, wherein PCI Express, in an interface unit, receiving the communication data, of the data processing device, a filter means, at least part of which is embodied as hardware, is used so that, according to configuration information, prescribed on the data processing device, containing at least one approval condition that rates the at least one property of the useful data contained in the communication data, only the communication data meeting at least one approval condition are forwarded from the interface unit to at least one further component of the data processing device.

A system and method for logging state data from a power system control device on a computer system is disclosed. The computer system includes a power system supplying power to the computer system. The power system has a power-up sequence having a plurality of stages. The power system control device is coupled to the power system. The power system control device includes a finite state machine circuit having states corresponding to the stages of the power-up sequence. The control device also has a write controller, a storage buffer, and a communication interface. The write controller writes the state of the finite state machine circuit in the storage buffer. An external controller is coupled to the communication interface and is operable to read the stored state data.

Enabling a protocol for efficiently and reliably using the NVME protocol over a network, referred to as NVME over Network, or NVMEoN, may include an NVMEoN exchange layer for handling exchanges between initiating and target nodes on a network, a burst transmission protocol that provides guaranteed delivery without duplicate retransmission, and an exchange status block approach to manage state information about exchanges.

A user station for a serial bus system. The user station includes a receiver for receiving a signal from a bus of the bus system, and a device for evaluating the reception signal that is output by the receiver. The receiver generates a digital reception signal from the signal received from the bus and to output the signal to the device at a terminal. The device evaluates the digital reception signal with regard to a predetermined communication protocol that establishes when a predetermined communication phase, which indicates a subsequent transfer of useful data in a message, begins and ends. The device reverses the data flow of the digital reception signal to the receiver at the terminal for a time period of at least one bit if the evaluation of the device shows that data at that time are being received from the bus in the predetermined communication phase.

An adaptation method between PCIE and SPI realized based on FPGA, comprising following steps: S01: a PCIE equipment sends PCIE information to a mapping module through a PCIE module; S02: the mapping module extracts SPI information from the PCIE information and transmits the SPI information to a SPI equipment through an SPI module; all of the PCIE module, the mapping module and the SPI module are located on a FPGA chip; S03: the SPI equipment performs a read/write operation according to the SPI information, and feeds back SPI operation information subjected to the read/write operation to the mapping module; S04: the mapping module modifies PCIE information according to the SPI operation information to obtain PCIE feedback information; S05: the PCIE equipment reads the PCIE feedback information through the PCIE module. The present invention provides a conversion adapter and a method between PCIE and SPI realized based on FPGA to realize conversion for a PCI interface and a SPI interface, so as to perform a read/write operation of an AD chip with the SPI interface or a DA chip with the SPI interface, which has universal applicability.

The present disclosure provides a mobile power supply and a method for supplying power to a peripheral device. The mobile power supply comprises a first peripheral connection port and a second peripheral connection port, a first group of connection-port processing circuits and a second group of connection-port processing circuits, a control circuit, and a power supply circuit. A control strategy determining circuit in each group of connection-port processing circuits determines a voltage adjustment strategy according to power supply status information of a corresponding peripheral connection port. The control circuit then causes a voltage adjusting circuit in the connection-port processing circuit to adjust, according to the voltage adjustment strategy, a voltage output by the power supply circuit, such that the adjusted voltage is used to supply power to a peripheral device coupled, by means of a power supply terminal, to the peripheral connection port.

A synchronous serial bus peripheral circuit includes a peripheral identification (ID) register and a state machine circuit. The state machine circuit is coupled to the peripheral ID register, and is configured to transmit a status value based on a peripheral ID field of data received via the receiver shift register equaling a value stored in the peripheral ID register.