G06F13/4282

Keyboard/video/monitor switch for servers without integrated video controller

An apparatus comprises a switch and nodes coupled to the switch. Each node does not include an integrated video controller and transmits data to the switch via a USB and a serial connection. The switch comprises a controller which stores video output generated based on data received via serial connections. The controller: receives a user selection for a first node; transmits the user selection to a first multiplexer; retrieves a first video output generated based on data received via the corresponding serial connection; and transmits the first video output to a second multiplexer. The first multiplexer transmits USB data received from the first node to the second multiplexer. If the first node is in a pre-boot environment, the second multiplexer selects the first video output for transmission. If the first node is in a post-boot environment, the second multiplexer selects the data received from the first node for transmission.

Electronic system

In accordance with an embodiment, an electronic device includes a secure element configured to implement a plurality of operating systems; and a near field communication module coupled to the secure element by a single bus and by a routing circuit configured to route routing data between the plurality of operating systems and a receive circuit of the near field communication module.

Ordered sets for high-speed interconnects
11595318 · 2023-02-28 · ·

A system and apparatus can include a port for transmitting data; and a link coupled to the port. The port can include a physical layer device (PHY) to decode a physical layer packet, the physical layer packet received across the link. The physical layer packet can include a first bit sequence corresponding to a first ordered set, and a second bit sequence corresponding to a second ordered set, the first bit sequence immediately adjacent to the second bit sequence. The first ordered set is received at a predetermined ordered set interval, which can occur following a flow control unit (flit). The first ordered set comprises eight bytes and the second ordered set comprises eight bytes. In embodiments, bit errors in the ordered sets can be determined by checking bits received against expected bits for the ordered set interval.

Front End Traffic Handling In Modular Switched Fabric Based Data Storage Systems

Systems, methods, apparatuses, and software for data storage systems are provided herein. In one example, a data storage system is provided that includes storage drives each comprising a PCIe interface, and configured to store data and retrieve the data stored on associated storage media responsive to data transactions received over a switched PCIe fabric. The data storage system includes processors configured to each manage only an associated subset of the storage drives over the switched PCIe fabric. A first processor is configured to identify first data packets received over a network interface associated with the first processor within a network buffer of the first processor as comprising a storage operation associated with at least one of the plurality of storage drives managed by a second processor, and responsively transfer the first data packets into a network buffer of the second processor.

METHODS FOR INTELLIGENT LOAD BALANCING AND HIGH SPEED INTELLIGENT NETWORK RECORDERS

A high speed intelligent network recorder for recording a plurality of flows of network data packets into and out of a computer network over a relevant data time window is disclosed. The high speed intelligent network recorder includes a printed circuit board; a high speed network switching device mounted to the printed circuit board; and an X column by Y row array of a plurality of intelligent hard drives with micro-computers mounted to the printed circuit board and coupled in parallel with the high speed network switching device.

A method for network recording is disclosed. In one embodiment, the method includes the following: receiving a plurality of incoming packets, wherein each incoming packet belongs to a conversation flow; forming a capture stream of packet records for the incoming packets; and performing intelligent load balancing on the capture stream of packet records, the load balancing including reading the metadata for each packet record, determining a packet record is part of either a hot flow or a cold flow, selecting a destination node for each packet record based on the flow hash, and steering the packet record to one of a plurality of encapsulation buffers based on the destination node, wherein a cold flow tends to be maintained in a flow coherency at a node. The method may further include operations that include querying and back-testing in order to enable distributed analytics by using low cost, low band width nodes.

CONTROL SYSTEM AND CONTROL METHOD THEREOF

A control system includes a first expander board and a second expander board. The first expander board selects a first data segment from a first data signal according to a first clock signal. The second expander board is electrically connected to the first expander board. The second expander board is configured to receive the first data segment and the first clock signal of the first expander board. The second expander board selects a second data segment from a second data signal according to a second clock signal and sequentially outputs the first data segment and the second data segment. The sequentially output form of the first data segment and the second data segment from the second expander board is a serial data signal.

Systems and Methods for Provisioning Devices Operating in Industrial Automation Environments
20180004700 · 2018-01-04 · ·

A device is configured to operate in an industrial automation environment. The device includes a processing unit, a memory, an industrial communication interface to communicate with an external device via an industrial communication protocol, and a serial peripheral interface to communicate with a peripheral board during operation of the device. The device is configured to receive configuration data related to an industrial automation function of the device via the serial peripheral interface and store the received configuration data in the memory, when the serial peripheral interface is coupled to an external memory device. When the serial peripheral interface is coupled to the peripheral board, the device is configured to operate to perform the industrial automation function, in accordance with the received configuration data.

HIGH PERFORMANCE INTERCONNECT LINK LAYER

Transaction data is identified and a flit is generated to include three or more slots and a floating field to be used as an extension of any one of two or more of the slots. In another aspect, the flit is to include two or more slots, a payload, and a cyclic redundancy check (CRC) field to be encoded with a 16-bit CRC value generated based on the payload. The flit is sent over a serial data link to a device for processing, based at least in part on the three or more slots.

Vehicle fleet information service

A vehicle information service implemented on one or more computers of a service provider network implements a first application programmatic interface (API) that allows a client to define inclusion parameters and a sample size for a fleet of vehicles from which vehicle data is to be collected. The vehicle information service also implements a second API that notifies the client when the requested vehicle data has been collected from the vehicle fleet. Additionally, the vehicle information service provides the client access to the collected vehicle data. The vehicle information service manages the collection of the vehicle data from the client defined vehicle fleet without requiring further client involvement and notifies the client when the collection of the vehicle data is complete.

INTERCONNECT WAKE RESPONSE CIRCUIT AND METHOD
20180011528 · 2018-01-11 · ·

In some embodiments, provided are circuits and approaches for responding to wake requests over a data bus such as with a USB interface. An interconnect PHY may be placed into an aggressive power reduction mode and in response to a detected wake request on the bus, respond in a sufficient time by keeping at least a portion of a transmitter data path in the PHY powered on during the reduced power mode and responding to the wake request while the PHY re-boots in the background.