The present technology is to provide a detector capable of detecting an input voltage outside the guaranteed operating voltage range, even if the delay time caused in a logic element by a decrease in power-supply voltage varies due to an external factor.

The detector includes a plurality of first detection circuits, a first detection rate calculation unit, a plurality of second detection circuits, a second detection rate calculation unit, and a comparison determination unit. In the detector to be provided, each of the plurality of first detection circuits detects whether or not an input voltage has a value outside a guaranteed operating range for a normal operation, the first detection rate calculation unit calculates a first detection rate of the detected number of the first detection circuits, each of the plurality of second detection circuits detects whether or not a predetermined reference voltage is lower than a threshold voltage, the second detection rate calculation unit calculates a second detection rate of the detected number of the second detection circuits, and the comparison determination unit determines the value of the input voltage to be equal to or smaller than the value of the threshold voltage when the first detection rate is equal to or higher than the second detection rate.

The present disclosure provides a current sensing device, method and system, where the device is applied in a power conversion circuit. The current sensing device includes a first winding coupled to the resonant inductor, a second winding and an integrating circuit coupled to a primary winding of the transformer having a first input terminal, a second input terminal, an output terminal, and a common terminal; one terminal of the first winding is coupled to the first input terminal of the integrating circuit, the other terminal of the first winding and the other terminal of the second winding are coupled and connected to the common terminal of the integrating circuit; one terminal of the second winding is coupled to the second input terminal of the integrating circuit.

An electronic device includes a driver that is connected with a pin, receives an input signal, and outputs an output signal to the pin in response to the input signal, a core circuit that transfers the input signal to the driver, and a monitor circuit that receives the input and output signals and detects a stuck voltage state of the output signal based on the input and output signals. The monitor circuit includes a first detection circuit that detects the stuck voltage state when the input and output signals are logically incorrect, a second detection circuit that detects the stuck voltage state when the input and output signals are logically correct and when the output signal is at a low level, and a third detection circuit that detects the stuck voltage state when the input and output signals are logically correct and when the output signal is at a high level.

A voltage attack detection circuit of a chip includes: a first programmable resistor and a second programmable resistor, a first terminal of the first programmable resistor is connected to a supply voltage, a second terminal of the first programmable resistor is connected to a ground voltage through the second programmable resistor, the first terminal outputs a first voltage, the second terminal outputs a second voltage; a voltage detection circuit, receives the first voltage and a first reference voltage and output a first signal, where the first signal is configured to indicate whether the first voltage is greater than or equal to the first reference voltage, the voltage detection circuit is further configured to receive the second voltage and a second reference voltage and output a second signal, and the second signal is configured to indicate whether the second voltage is less than or equal to the second reference voltage.

A detection circuit includes a tunable delay circuit that generates a delayed signal and that receives a supply voltage. The detection circuit includes a control circuit that adjusts a delay provided by the tunable delay circuit to the delayed signal. The detection circuit includes a time-to-digital converter circuit that converts the delay provided by the tunable delay circuit to the delayed signal to a digital code and adjusts the digital code based on changes in the supply voltage. The control circuit causes the tunable delay circuit to maintain the delay provided to the delayed signal constant in response to the digital code reaching an alignment value. The detection circuit may continuously monitor timing margin of a data signal relative to a clock signal and update the digital code in every clock cycle. The detection circuit may be a security sensor that detects changes in the supply voltage.

The application provides an apparatus, a system, a detector and a detection method for power supply voltage detection. The apparatus connected to an integrated circuit power supply network comprises: a power supply voltage detector, comprising: N buffers, wherein an input terminal of a first buffer is connected to a clock signal, and output terminals of other buffers are connected to the input terminal of an adjacent buffer; N latch chains, each of which comprises M latches, wherein a clock input terminal of each latch is connected to a clock signal, a D terminal of a first latch of each latch chain is connected to the output terminal of a corresponding buffer, and Q terminals of other latches are connected to the D terminal of an adjacent latch, wherein M and N are positive integers, the VDD terminal of each latch is connected to an area in an integrated circuit power supply network where a power supply voltage is to be detected, and a grounding terminal of each latch is connected to a ground; and a voltage regulation module connected to the Q terminal of each latch and configured to detect data output of each latch to determine a magnitude of a power supply voltage.

The present invention relates to a power circuit, which comprises a detection circuit. The detection circuit includes an abnormality detection circuit. The abnormality detection circuit is coupled to an input terminal or/and an output terminal of the power circuit. An input power is provided to the input terminal, and an output power is provided to the output terminal. The abnormality detection circuit controls the paths from a plurality of energy storage elements to the input terminal and the output terminal of the power circuit. The energy storage elements store the energy of the input power to generate the output power. The abnormality detection circuit detects the state of the input power or/and the output power, and cuts off the paths from a portion of the energy storage elements to the input terminal and the output terminal.

The present disclosure provides an abnormal voltage monitoring device, a storage device, and a vehicle. The abnormal voltage monitoring device comprises a voltage divider configure to receive an input voltage from a voltage generator and output a first distribution voltage based on the input voltage, a second bandgap reference generation circuit configured to output a reference voltage, and a monitoring circuit configured to receive the first distribution voltage from the voltage divider and the reference voltage from the second bandgap reference generation circuit, and output an alarm signal responsive to comparing a voltage level of the first distribution voltage with that of the reference voltage. The voltage generator comprises a first bandgap reference generation circuit, and the second bandgap reference generation circuit is configured to generate the reference voltage differently than the first bandgap reference generation circuit.

A mode-transition architecture for USB controllers is described herein. In an example embodiment, an integrated circuit (IC) controller includes a controller coupled to a slope compensation circuit, the controller to detect a transition of a buck-boost converter from a first mode having a first duty cycle to a second mode having a second duty cycle that is less or more than the first duty cycle. The controller controls the slope compensation circuit to nullify an error in an output caused by the transition. The controller can cause the slope compensation circuit to apply a charge stored in a capacitor during a first cycle to start a second cycle with a higher voltage than the first cycle.

A digital circuit device includes a power supply circuitry, a digital circuitry, a digital circuitry, and a protection circuitry. The power supply circuitry is configured to output a supply voltage. The digital circuitry is configured to be driven by the supply voltage, and is configured to perform at least one operation according to a first clock signal. The protection circuitry is configured to generate the first clock signal according to at least one of a voltage drop of the supply voltage and a load signal sent from the digital circuitry.