The invention describes an integrated photonics platform comprising a plurality of at least three vertically-stacked waveguides which enables light transfer from one waveguide of the photonic structure into another waveguide by means of controlled tunneling method. The light transfer involves at least three waveguides wherein light power flows from initial waveguide into the final waveguide while tunneling through the intermediate ones. As an exemplary realization of the controlled tunneling waveguide integration, the invention describes a photonic integrated structure consisting of laser guide as upper waveguide, passive guide as middle waveguide, and modulator guide as lower waveguides. Controlled tunneling is enabled by the overlapped lateral tapers formed on the same or different vertical waveguide levels. In the further embodiments, the controlled tunneling platform is modified to implement wavelength-(de)multiplexing, polarization-splitting and beam-splitting functions.

A device may include a first substrate. The device may include an optical source. The optical source may generate light when a voltage or current is applied to the optical source. The optical source may be being provided on a first region of the first substrate. The device may include a second substrate. A second region of the second substrate may form a cavity with the first region of the first substrate. The optical source may extend into the cavity. The device may include an optical interconnect. The optical interconnect may be provided on or in the second substrate and outside the cavity. The optical interconnect may be configured to receive the light from the optical source.

A method of producing a heterogeneous photonic integrated circuit includes integrating at least one III-V hybrid device on a source substrate having at least a top silicon layer, and transferring by transfer-printing or by flip-chip bonding the III-V hybrid device and at least part of the top silicon layer of the source substrate to a semiconductor-on-insulator or dielectric-on-insulator host substrate.

Embodiments herein relate to photonic integrated circuits with an on-chip optical isolator. A photonic transmitter chip may include a laser and an on-chip isolator optically coupled with the laser that includes an optical waveguide having a section coupled with a magneto-optic liquid phase epitaxy grown garnet film. In some embodiments, a cladding may be coupled with the garnet film, the on-chip isolator may be arranged in a Mach-Zehnder interferometer configuration, the waveguide may include one or more polarization rotators, and/or the garnet film may be formed of a material from a rare-earth garnet family. Other embodiments may be described and/or claimed.

A grating coupler having first and second ends for coupling a light beam to a waveguide of a chip includes a substrate configured to receive the light beam from the first end and transmit the light beam through the second end, the substrate having a first refractive index n1, a grating structure having curved grating lines arranged on the substrate, the grating structure having a second refractive index n1, wherein the curved grating lines have line width w and height d and are arranged by a pitch Λ, wherein the second refractive index n2 is less than first refractive index n1, and a cladding layer configured to cover the grating structure, wherein the cladding layer has a third refractive index n3.

A device comprises first, second and third elements fabricated on a common substrate. The first element comprises an active waveguide structure comprising: one portion, of effective cross-sectional area A1, supporting a first optical mode; and a second portion, butt-coupled to the first portion, of effective cross-sectional area A2>A1. The second element comprises a passive waveguide structure supporting a second optical mode. The third element, at least partly butt-coupled to the second portion, comprises an intermediate waveguide structure supporting intermediate optical modes. If the first optical mode differs from the second optical mode by more than a predetermined amount, a tapered waveguide structure in at least one of the second and third elements facilitates efficient adiabatic transformation between the first optical mode and one intermediate optical mode. No adiabatic transformation occurs between any intermediate optical mode and the first optical mode. Mutual alignments of the elements are defined using lithographic marks.

An electro-optically active device comprising: a silicon on insulator (SOI) substrate including a silicon base layer, a buried oxide (BOX) layer on top of the silicon base layer, a silicon on insulator (SOI) layer on top of the BOX layer, and a substrate cavity which extends through the SOI layer, the BOX layer and into the silicon base layer, such that a base of the substrate cavity is formed by a portion of the silicon base layer; an electro-optically active waveguide including an electro-optically active stack within the substrate cavity; and a buffer region within the substrate cavity beneath the electro-optically active waveguide, the buffer region comprising a layer of Ge and a layer of GaAs.

The present disclosure relates to a method for growing III-V compound semiconductors on silicon-on-insulators. Starting from {111}-oriented Si seed surfaces between a buried oxide layer and a patterned mask layer, the III-V compound semiconductor is grown within lateral trenches by metal organic chemical vapor deposition such that the non-defective portion of the III-V compound semiconductor formed on the buried oxide layer is substantially free of crystalline defects and has high crystalline quality.

An electro-optically active device comprising: a silicon on insulator (SOI) substrate including a silicon base layer, a buried oxide (BOX) layer on top of the silicon base layer, a silicon on insulator (SOI) layer on top of the BOX layer, and a substrate cavity which extends through the SOI layer, the BOX layer and into the silicon base layer, such that a base of the substrate cavity is formed by a portion of the silicon base layer; an electro-optically active waveguide including an electro-optically active stack within the substrate cavity; and a buffer region within the substrate cavity beneath the electro-optically active waveguide, the buffer region comprising a layer of Ge and a layer of GaAs.

A laser integrated photonic platform to allow for independent fabrication and development of laser systems in silicon photonics. The photonic platform includes a silicon substrate with an upper surface, one or more through silicon vias (TSVs) defined through the silicon substrate, and passive alignment features in the substrate. The photonic platform includes a silicon substrate wafer with through silicon vias (TSVs) defined through the silicon substrate, and passive alignment features in the substrate for mating the photonic platform to a photonics integrated circuit. The photonic platform also includes a III-V semiconductor material structure wafer, where the III-V wafer is bonded to the upper surface of the silicon substrate and includes at least one active layer forming a light source for the photonic platform.