Patent classifications
G02B2006/12097
Light Output Devices and Light Outputting Methods for Optical Systems
Configurations for an optical system used for guiding light and reducing back-reflection back in an output waveguide is disclosed. The optical system may include an output waveguide defined in a slab waveguide. The output waveguide may terminate before an output side of the slab waveguide, which may reduce the back-reflection of light from the output side back into the output waveguide. The output side may define an optical element that may steer the output light. The optical element may collimate the output light, cause the output light to converge, or cause the output light to diverge.
WAVEGUIDE PLATFORM
A waveguide platform and method of fabricating a waveguide platform on a silicon wafer; the method comprising: providing a wafer having a layer of crystalline silicon;
lithographically defining a first region of the top layer; electrochemically etching the wave-guide platform to create porous silicon at the lithographically defined first region; epitaxially growing crystalline silicon on top of the porous silicon to create a first upper crystalline layer with a first buried porous silicon region underneath; wherein the first buried porous silicon region defines a taper between a first waveguide region of crystalline silicon having a first depth and a second waveguide region of crystalline silicon having a second depth which is smaller than the first depth.
TUNABLE IN-POOL WAVEGUIDE AND METHOD
A photonics integrated circuit includes a first waveguide and a second waveguide. A portion of the first waveguide has a first cladding with a first refractive index. The second waveguide includes a second cladding with a second refractive index different from the first refractive index. Also disclosed is a test circuit for a photonics integrated circuit. The test circuit can be used to determine waveguide losses, and used to tune the waveguide losses.
INTEGRATED ON-CHIP POLARIZATION ROTATION SPLITTER
An integrated on-chip polarization rotator splitter (26) comprises a waveguide polarization rotator (54) having a first and a second layer (62) that form a rib waveguide (66) together and are both made of silicon nitride. The first layer (62) has a first, a second and a third section. The first layer (64) has a first width (w.sub.1) that increases in the first section (S1), is constant in the second section (S1) and decreases in the third section (S3). The second layer (64) has a second width (w.sub.2) that continuously increases. The polarization rotator splitter (26) further includes a waveguide polarization splitter (61) comprising a first strip waveguide (71) and a second strip waveguide (72) that are separated by a gap (74). The first and second strip waveguides (71, 72) are also made of silicon nitride. The first and second strip waveguide (71, 72) form an asymmetric evanescent direction coupler.
Integrated structure and manufacturing method thereof
A method for fabricating an integrated structure, using a fabrication system having a CMOS line and a photonics line, includes the steps of: in the photonics line, fabricating a first photonics component in a silicon wafer; transferring the wafer from the photonics line to the CMOS line; and in the CMOS line, fabricating a CMOS component in the silicon wafer. Additionally, a monolithic integrated structure includes a silicon wafer with a waveguide and a CMOS component formed therein, wherein the waveguide structure includes a ridge extending away from the upper surface of the silicon wafer. A monolithic integrated structure is also provided which has a photonics component and a CMOS component formed therein, the photonics component including a waveguide having a width of 0.5 μm to 13 μm.
SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR DEVICE, AND METHOD OF PRODUCING THE SAME
A semiconductor device comprising a wafer with a preferably single-piece semiconductor substrate, in particular silicon substrate, and at least one integrated electronic component extending in and/or on the semiconductor substrate, the wafer having a front-end-of-line and a back-end-of-line lying there above, the front-end-of-line comprising the integrated electronic component or at least one of the integrated electronic components, and a photonic platform fabricated on the side of the wafer facing away from the front-end-of-line, which photonic platform comprises at least one waveguide and at least one electro-optical device, in particular at least one photodetector and/or at least one electro-optical modulator, wherein the electro-optical device or at least one of the electro-optical devices of the photonic platform is connected to the integrated electronic component or at least one of the integrated electronic components of the wafer.
METHOD FOR MANUFACTURING AN ELECTRO-OPTICAL DEVICE AND ELECTRO-OPTICAL DEVICE
The present application relates to a method for manufacturing an electro-optical device, wherein a waveguide (3) is provided (S1), a planarization coat (7) overlapping at least a section of the waveguide (3) is fabricated (S2), the planarization coat (7) is provided with a spin-on-glass coating (9) (S3), at least in the region of the spin-on-glass coating (9), a preferably dry chemical etching treatment is carried out (S4), optionally, the steps of providing the planarization coat (7) with a spin-on-glass coating (9) and the etching treatment are repeated at least once (S5, S6), and an active element (10) is provided (S7) on or above the planarization coat (7) and above the waveguide (3).
Waveguides Having Highly Suppressed Crosstalk
An optical waveguide includes a first waveguide core, a second waveguide core, a first subwavelength multilayer cladding, a second subwavelength multilayer cladding and a third subwavelength multilayer cladding. The first waveguide core and the second waveguide core have a width (w) and a height (h). The first waveguide core is disposed between the first subwavelength multilayer cladding and the second subwavelength multilayer cladding. The second waveguide core is disposed between the second subwavelength multilayer cladding and the third subwavelength multilayer cladding. Each subwavelength multilayer cladding has a number (TV) of alternating subwavelength ridges having a periodicy (A) and a filling fraction (p). A total coupling coefficient (|/c|) of the first waveguide core and the second waveguide core is from 10 to 0.
PROCESS FLOW WITH PRE-BIASED MASK AND WET ETCHING FOR SMOOTH SIDEWALLS IN SILICON NITRIDE WAVEGUIDES
Aspects of the present disclosure are directed to process flow to fabricate a waveguide structure with a silicon nitride core having atomic-level smooth sidewalls achieved by wet etching instead of the conventional dry etching process. A mask is pre-biased to account for lateral etching during the wet-etching steps.
MULTILAYER TRANSMISSION STRUCTURES FOR WAVEGUIDE DISPLAY
Embodiments of the present disclosure describe waveguides having device structures with multiple portions and methods of forming the waveguide having multiportion device structures. The plurality of device structures are formed having two or more portions. The materials of the plurality of portions are chosen such that impedance matching is enabled between the portions to reduce reflection of light from the optical device.