An isolator includes a substrate having a substrate surface, a waveguide, a groove, a mask, and a non-reciprocal member. The waveguide is disposed above the substrate surface and has a first surface facing the substrate surface, a second surface opposite the first surface, and a side face connecting the first surface to the second surface. The groove includes a bottom portion and a side portion configured to expose at least part of the side face of the waveguide. The mask is disposed above and overlaps at least a region of the second surface of the waveguide, as viewed in a direction normal to the substrate surface. The region of the second surface of the waveguide is in contact with the groove. The non-reciprocal member is disposed in the groove and is in contact with the side face of the waveguide.

Integrated optical devices and methods of forming the same are disclosed. A method of forming an integrated optical device includes the following steps. A substrate is provided. The substrate includes, from bottom to top, a first semiconductor layer, an insulating layer and a second semiconductor layer. The second semiconductor layer is patterned to form a waveguide pattern. A surface smoothing treatment is performed to the waveguide pattern until a surface roughness Rz of the waveguide pattern is equal to or less than a desired value. A cladding layer is formed over the waveguide pattern.

Semiconductor devices and methods of forming the semiconductor devices are described herein. A method includes providing a first material layer between a second material layer and a semiconductor substrate and forming a first waveguide in the second material layer. The method also includes forming a photonic die over the first waveguide and forming a first cavity in the semiconductor substrate and exposing the first layer. Once formed, the first cavity is filled with a first backfill material adjacent the first layer. The methods also include electrically coupling an electronic die to the photonic die. Some methods include packaging the semiconductor device in a packaged assembly.

A MOS capacitor-type optical modulator comprising a silicon-on-insulator (SOI) substrate, a first doped region in a silicon device layer of the SOI substrate, and a second doped region laterally separated from the first doped region by a vertically extending insulator layer to form a lateral MOS capacitor region. The first doped region, second doped region and insulator layer are formed from different materials.

A light splitting device includes an optical waveguide body and a dispersion grating. The optical waveguide body is configured to transmit incident light to the dispersion grating, the dispersion grating is configured to disperse the incident light transmitted by the optical waveguide body into a plurality of spectral lines, and the optical waveguide body is further configured to change propagation directions of the plurality of spectral lines and to emit the plurality of spectral lines.

A method for establishing optical coupling between spatially separated first and second planar waveguides includes arranging an optical interconnect on the first planar waveguide. The optical interconnect has first and second end portions and an intermediate portion. Each of the end portions has an inverse taper. The second planar waveguide is arranged on the optical interconnect so that the second planar waveguide overlaps with one of the inverse tapered end portions but not the other inverse tapered end portion to thereby enable an adiabatic transition of an optical signal from the first planar waveguide to the second planar waveguide via the optical interconnect. The first and second planar waveguides have different refractive indices at an operating wavelength and the optical interconnect have a higher refractive index at the operating wavelength than the refractive indices of a core of the first planar waveguide and a core of the second planar waveguide.

A hybrid photonic chip comprising a plurality of semiconductor materials arranged to define a chip providing a function, wherein at least a first part of the chip is formed of materials which can be fabricated using a CMOS technique; and at least a second part of the chip which comprises non-linear crystal material and is not subjected to etching process; wherein the second part of the chip in conjunction with the first part is configured to support a propagating low loss single mode.

Integrated optical devices and methods of forming the same are disclosed. A method of forming an integrated optical device includes the following steps. A substrate is provided. The substrate includes, from bottom to top, a first semiconductor layer, an insulating layer and a second semiconductor layer. The second semiconductor layer is patterned to form a waveguide pattern. A surface smoothing treatment is performed to the waveguide pattern until a surface roughness Rz of the waveguide pattern is equal to or less than a desired value. A cladding layer is formed over the waveguide pattern.

Embodiments described herein provide for methods of forming optical device structures having continuously increasing or decreasing duty cycles. One embodiment includes a device. The device includes a plurality of optical device structures. Each optical device structure of the plurality of optical device structures includes a plurality of discrete zones. Each discrete zone of the plurality of discrete zones has a critical dimension. The device further includes a plurality of transition zones disposed between two discrete zones of the plurality of discrete zones. The critical dimension of each transition zone of the plurality of transition zones continuously increases or decreases across a length of each optical device structure of the plurality of optical device structures.

A photonic integrated circuit (PIC) system, preferably including a substrate, one or more photonic connections, and a plurality of circuit blocks. The circuit blocks preferably include one or more waveguides that are optically coupled to the photonic connections, such as by transition features. A method of PIC fabrication, preferably including defining a PIC structure and defining circuit blocks. The circuit blocks are preferably defined onto one or more template regions defined by the PIC structure. Photonic connections are preferably defined as part of the PIC structure. Transition features, such as transitions between the photonic connections and the circuit blocks, are preferably defined concurrently with defining the circuit blocks.