A controller includes memory and a microcontroller coupled to the memory. The memory is configured to store a list of entries of data in Flash memory coupled to the controller. The microcontroller is configured to periodically update the list of entries based on data programmed into the Flash memory, and check the list of entries upon reading data from the Flash memory.

A computer-implemented method according to one embodiment includes identifying a plurality of storage systems within a storage environment, determining characteristics of each of the plurality of storage systems, the characteristics including one or more data reduction techniques implemented by each of the plurality of storage systems, performing a plurality of storage simulations of one or more data volumes, utilizing the characteristics of each of the plurality of storage systems, and determining one of the plurality of storage systems to store the one or more data volumes, based on results of the plurality of storage simulations.

A variety of applications can include memory systems that have one or more memory devices capable of performing memory operations on multiple blocks of memory in response to a command from a host. For example, improvement in erase performance can be attained by erasing multiple blocks of memory by one of a number of approaches. Such approaches can include parallel erasure followed by serial verification in response to a single command. Other approaches can include sequential erase and verify operations of the multiple blocks in response to a single command. Additional apparatus, systems, and methods are disclosed.

Commands in a command queue are received and scheduled. For each of the commands, scheduling includes determining an age of a command based on an entrance time of the command in the command queue. When the age of the command satisfies a first threshold, marking all other commands in the command queue as not issuable when the command is a deterministic command, and marking all other commands in the command queue as not issuable when the command is a non-deterministic command and the intermediate command queue is not empty. Scheduling the command further includes determining whether the command is a read command and marking the command as not issuable when the command is a non-deterministic read command and the intermediate command queue is empty.

A container storage system that provides storage services to a container system provides data resiliency using storage pools based on: detecting an interruption to storage services associated with a first storage pool that includes a first plurality of storage resources on which a first set of replicas of a dataset is distributed; selecting, in response to the interruption, a second storage pool that includes a second plurality of storage resources; and generating, based on one or more replicas within the first set of replicas, a second set of replicas of the dataset distributed among the second plurality of storage resources in the second storage pool.

A memory controller may calculate a sum of a first number of entries stored in a read buffer and a second number of entries stored in a write buffer. If the sum is less than a first threshold and the read/write buffer is not full of entries, then the memory controller can request read/write commands from a host computing device. If the sum is not less than the first threshold or the read/write buffer is full of entries, then the memory controller can assert backpressure to stop the incoming flow newly incoming read/write commands from the host computing device. Additionally, or alternatively, the memory controller may dequeue a write command entry only if a number of write command entries stored in a write command FIFO memory is greater than a second threshold. The memory controller may dequeue read command stored in a read FIFO memory if the number of write command entries stored in the write command FIFO memory is less than or equal to the second threshold and the read FIFO memory is not empty of the read command entries.

Various implementations described herein relate to creating a namespace in response to determining that a sum of namespace sizes of a plurality of namespaces is less than a first threshold for the point of thin-provisioning. A write command and data are received from a host. The write command and the data are received in response to determining that a sum of namespace utilization of the plurality of namespaces is less than a second threshold. The data is compressed and stored in the created namespace.

Aspects of the present disclosure relate to controlling resource consumption of a server and storage array. In embodiments, a request can be received by a server that is communicatively coupled to a storage array. Further, the services required to process the request can be identified. Additionally, services' activation can be controlled based on a mapping of request-related actions and initiated services.

Techniques for extending a storage system having a first pool involve adding, in response to a request, second storage devices, wherein the first pool is generated using first storage devices and based on a first standard. The first pool includes first stripes created using the first standard, and the number of the second storage devices equals a first stripe width associated with the first standard. Such techniques further involve creating a second pool using the second storage devices and based on a second standard, wherein a second stripe width associated with the second standard equals the first stripe width. Such techniques further involve creating second stripes in the second pool using the second storage devices and based on the second standard. Such techniques further involve storing data of at least one of the first stripes to a corresponding stripe of the second stripes according to a data shuffle rule.

A memory sub-system can receive a definition of a performance target for each of a number of applications that use the memory sub-system for storage. The memory sub-system can create a plurality of partitions according to the definitions and assign each of the partitions to a block group. The memory sub-system can operate each block group with a trim tailored to the performance target corresponding to that block group and application.