G06F3/0604

Managing page retirement for non-volatile memory

Methods, systems, and devices for retiring pages of a memory device are described. An ordered set of device information pages may be used to store device information. The device information pages may be in non-volatile memory. Each page may include a counter value of the number of accesses to indicate if the page includes valid data. A flag associated with the page may be set when the counter value reaches a threshold, to retire the page. Upon power-up, the device may determine which page to use, based on the flags. The flag may be stored in the page, or may be separate (e.g., fuse elements). If fuse elements are used, the page may store a programming-in-process flag to indicate when programming of the fuse element may not have been completed before power loss, in which case the programming may be restarted after power is restored.

Storage system and data processing method

The functions of a mainframe environment are expanded by leveraging the functions of an open environment. A second storage of an open system externally connected to a first storage of a mainframe system comprises a second main volume of an open environment generated in association with a main logical device of the second storage, and a second sub volume of an open environment generated in association with a sub logical device of the second storage; the first storage comprises a first main volume of a mainframe environment generated in association with the main logical device of the second storage, and a first sub volume of a mainframe environment generated in association with the sub logical device of the second storage; when the first storage receives a data processing request from a host, the first storage reflects the processing request in the second storage and completes the processing; and when the first storage receives an execution request of a prescribed function, the first storage causes the second storage to execute the function.

NVMe-based data writing method, apparatus, and system

In an NVMe-based storage system, a host is connected to an NVMe controller through a PCIe bus, and the NVMe controller is connected to a storage medium. The NVMe controller receives from the host a data packet that carries payload data and an association identifier. The association identifier associates the payload data with a write instruction. The NVMe controller obtains the write instruction according to the association identifier, and then writes the payload data into the storage medium according to the write instruction.

Garbage collection based on cloud storage capacity

A storage capacity of a cloud storage system is determined. A recipe contains instructions for reclaiming storage of the cloud storage system. The storage capacity is insufficient to perform the entire recipe. In response, one or more data objects are deleted. A portion of the recipe is executed after the deletion. In some cases, local storage can be used for garbage collection when cloud storage is insufficient to perform even the portion of the recipe. Other embodiments are described and claimed.

Data movement between different cell regions in non-volatile memory
11579792 · 2023-02-14 · ·

According to one embodiment, a memory system includes a non-volatile memory array with a plurality of memory cells. Each memory cell is a multilevel cell to which multibit data can be written. The non-volatile memory array includes a first storage region in which the multibit data of a first bit level is written and a second storage region in which data of a second bit level less than the first bit level is written. A memory controller is configured to move pieces of data from the first storage region to the second storage region based on the number of data read requests for the pieces of data received over a period of time or on external information received from a host device that sends read requests.

Devices for time division multiplexing of state machine engine signals

A device includes a plurality of blocks. Each block of the plurality of blocks includes a plurality of rows. Each row of the plurality of rows includes a plurality of configurable elements and a routing line, whereby each configurable element of the plurality of configurable elements includes a data analysis element comprising a plurality of memory cells, wherein the data analysis element is configured to analyze at least a portion of a data stream and to output a result of the analysis. Each configurable element of the plurality of configurable elements also includes a multiplexer configured to transmit the result to the routing line.

Object memory data flow triggers
11579774 · 2023-02-14 · ·

Embodiments of the invention provide systems and methods for managing processing, memory, storage, network, and cloud computing to significantly improve the efficiency and performance of processing nodes. More specifically, embodiments of the present invention are directed to an instruction set of an object memory fabric. This object memory fabric instruction set can include trigger instructions defined in metadata for a particular memory object. Each trigger instruction can comprise a single instruction and action based on reference to a specific object to initiate or perform defined actions such as pre-fetching other objects or executing a trigger program.

Method and apparatus for storage device latency/bandwidth self monitoring

A storage device is described. The storage device may store data in a storage memory, and may have a host interface to manage communications between the storage device and a host machine. The storage device may also include a translation layer to translate addresses between the host machine and the storage memory, and a storage interface to access data from the storage memory. An in-storage monitoring engine may determine characteristics of the storage device, such as latency, bandwidth, and retention.

Memory system and method of controlling memory system

According to one embodiment, a memory system includes a non-volatile semiconductor memory, a block management unit, and a transcription unit. The semiconductor memory includes a plurality of blocks to which data can be written in both the first mode and the second mode. The block management unit manages a block that stores therein no valid data as a free block. When the number of free blocks managed by the block management unit is smaller than or equal to a predetermined threshold value, the transcription unit selects one or more used blocks that stores therein valid data as transcription source blocks and transcribes valid data stored in the transcription source blocks to free blocks in the second mode.

Queues reserved for direct access via a user application
11581943 · 2023-02-14 · ·

A storage controller includes a processing device to send a Non-Volatile Memory Express over Fibre Channel (NVMe/FC) command to a submission queue without routing the NVMe/FC command through a kernel space, the submission queue being reserved for direct access by an initiator device to a user space of the storage controller.