G06F3/0625

COMMAND SCHEDULING IN A MEMORY SUBSYSTEM ACCORDING TO A SELECTED SCHEDULING ORDERING
20220374166 · 2022-11-24 ·

Methods, systems, and apparatus for command scheduling in a memory subsystem according to a selected scheduling ordering are described. Scheduling orderings are determined for a set of commands, where a scheduling ordering identifies an order by which a memory subsystem controller is to issue each command in the set of commands to the memory device. Scores are calculated for the scheduling orderings. A score of the plurality of scores includes a measure of performance of execution of the set of commands according to the scheduling ordering. A scheduling ordering is selected from the scheduling orderings based on the scores, and a command is issued to the memory device according to the scheduling ordering.

Technologies for switching network traffic in a data center

Technologies for switching network traffic include a network switch. The network switch includes one or more processors and communication circuitry coupled to the one or more processors. The communication circuitry is capable of switching network traffic of multiple link layer protocols. Additionally, the network switch includes one or more memory devices storing instructions that, when executed, cause the network switch to receive, with the communication circuitry through an optical connection, network traffic to be forwarded, and determine a link layer protocol of the received network traffic. The instructions additionally cause the network switch to forward the network traffic as a function of the determined link layer protocol. Other embodiments are also described and claimed.

Data link between volatile memory and non-volatile memory
11507175 · 2022-11-22 · ·

A computing system has a first processing device (e.g., CPU, FPGA, or GPU) and memory regions (e.g., in a DRAM device) used by the processing device during normal operation. In one approach, the computing system is configured to: collect data associated with operation of an autonomous vehicle; monitor, by a first processing device, the collected data; and based on the monitoring, determine that an event on the autonomous vehicle has occurred. The computing system is further configured to, in response to determining that the event has occurred, initiate a transfer of data controlled by a second processing device, the transfer including copying data stored in volatile memory of the autonomous vehicle to non-volatile memory of the autonomous vehicle, wherein the second processing device controls copying of the data independently of the first processing device. The computing system is also further configured to, in response to determining that the event has occurred, reduce or terminate power to the first processing device.

Increasing power efficiency for an information handling system
11592894 · 2023-02-28 · ·

In one embodiment, a method for increasing power efficiency for an information handling system includes: monitoring, by a host service, one or more performance metrics associated with a memory device of the information handling system, the memory device including a power controller communicably coupled to a management device via a side-band bus; predicting, by the host service, an energy requirement for the memory device based on the one or more performance metrics; generating, by the host service, a power configuration profile based on the energy requirement, the power configuration profile indicating one or more power controller parameters associated with the power controller; sending, by the host service, the power configuration profile to the management device; receiving, by the management device, the power configuration profile; and modifying, by the management device and via the side-band bus, the one or more power controller parameters based on the power configuration profile.

Node Interconnection Apparatus, Resource Control Node, and Server System
20220365690 · 2022-11-17 ·

A node interconnection apparatus includes a computing node, a resource control node, and a device interconnection interface connecting the computing node and the resource control node. Each of the computing node and the resource control node includes a processing unit and a storage unit, and the resource control node further includes a resource interface for connecting with a network storage device. The resource control node manages a storage resource of the network storage device, and when the computing node needs to start up, the resource control node obtains operating system startup information from the network storage device and provides the operating system startup information to the computing node. The computing node can start up without the need for storing startup information locally.

COMPUTING SYSTEM AND OPERATING METHOD THEREOF
20230058630 · 2023-02-23 ·

A computing system includes host and a storage device. The host includes a host memory and a user interface. The storage device provides the host with a first request including device setting inquiry information, and sets a device configuration based on a first response to the device setting inquiry information received from the host. The host provides the storage device with the first response acquired from a user through the user interface in response to the first request. The device setting inquiry information includes at least one of information on allocation of a map buffer in the host memory, information on allocation of a write buffer in a buffer region of the storage device, or information on a power level of the storage device.

STORAGE DEVICE AND POWER MANAGEMENT METHOD THEREOF
20230058022 · 2023-02-23 · ·

A storage device, and a method of operating the storage device, includes a plurality of memory devices configured to store peak power information including information about a plurality of peak power periods and information about IDs respectively corresponding to the plurality of peak power periods. The storage device also includes a memory controller configured to assign an ID to each of the plurality of memory devices and control the memory devices so that one or more memory devices having an identical ID corresponding to a target period, among the plurality of peak power periods, perform a memory operation at peak power.

Adaptive memory system
11586361 · 2023-02-21 · ·

Described apparatuses and methods control a voltage or a temperature of a memory domain to balance memory performance and energy use. In some aspects, an adaptive controller monitors memory performance metrics of a host processor that correspond to commands made to a memory domain of a memory system, including one operating at cryogenic temperatures. Based on the memory performance metrics, the adaptive controller can determine memory performance demand of the host processor, such as latency demand or bandwidth demand, for the memory domain. The adaptive controller may alter, using the determined performance demand, a voltage or a temperature of the memory domain to enable memory access performance that is tailored to meet the demand of the host processor. By so doing, the adaptive controller can manage various settings of the memory domain to address short- or long-term changes in memory performance demand.

VOLATILE MEMORY TO NON-VOLATILE MEMORY INTERFACE FOR POWER MANAGEMENT
20230046808 · 2023-02-16 ·

Systems, methods, and apparatus related to a memory system that manages an interface for a volatile memory device and a non-volatile memory device to control memory system power. In one approach, a controller evaluates a demand on memory performance. If the demand of a current computation task needed by the host is high, a DRAM device is powered-up to meet the demand. Otherwise, if the non-volatile memory device is adequate to meet the demand, the DRAM memory is partially or fully-powered down to save power. In another approach, a task performed for a host device uses one or more resources of a first memory device (e.g., DRAM). A performance capability of a second memory device (e.g., NVRAM) is determined. A controller of the memory system determines whether the performance capability of the second memory device is adequate to service the task. In response to determining that the performance capability is adequate, the controller changes a mode of operation of the memory system so that one or more resources of the second memory device are used to service the task.

OPERATING MEMORY DEVICE IN PERFORMANCE MODE
20220358009 · 2022-11-10 ·

A memory device is set to a performance mode. Data item is received. The data item in a page of a logical unit of the memory device associated with a fault tolerant stripe is stored. A redundancy metadata update for the fault tolerant stripe is delayed until a subsequent media management operation.