G06F3/0638

INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, AND INFORMATION PROCESSING PROGRAM

An information processing device selects, in a case where a plurality of pieces of data are collected and transmitted to a tape drive to be recorded on a magnetic tape, one mode of a first mode of transmitting a data group obtained by collecting the plurality of pieces of data without compression, to the tape drive, a second mode of transmitting a compressed data group in which the data group obtained by collecting the plurality of pieces of data is compressed, to the tape drive, or a third mode of transmitting a data group obtained by collecting a part of the plurality of pieces of data and remaining data, in which the part of the plurality of pieces of data is compressed and the remaining data is not compressed, to the tape drive, and transmits a data group generated in accordance with the selected mode, to the tape drive.

ONE PATH METADATA PAGE RECONSTRUCTION WITH NO DYNAMICAL MEMORY ALLOCATION FOR DELTA-LOG BASED STORAGE
20220414086 · 2022-12-29 ·

Techniques for reconstructing or building metadata pages in storage nodes that have a delta-log based architecture. The techniques include walking “up” an ancestor chain of a metadata page, detecting the most recent delta update for a metadata entry of the metadata page, writing the most recent delta update to a location of the metadata entry in the metadata page, setting a bitmap entry corresponding to the location of the metadata entry in the metadata page, detecting a less recent delta update for the metadata entry of the metadata page, and, having previously set the bitmap entry corresponding to the location of the metadata entry in the metadata page, avoiding writing the less recent delta update to the location of the metadata entry in the metadata page. In this way, the need to save in memory the entire ancestor chain of the metadata page can be eliminated.

DIGITAL RECORDING OF FIREARM IDENTIFICATION
20220412681 · 2022-12-29 ·

Digital Recording is provided using SWO technology wherein a microprocessor is located in a pistol and a single wire EEPROM is mounted on each cartridge used by the pistol. Power and data can be sent over a single wire from the microprocessor to the single wire EEPROM to communicate information about the pistol, such as the serial number, make, and model of the firearm.

KEY VALUE STORE WITH DISTRIBUTED SHARED ACCESS BY CLIENTS
20220413765 · 2022-12-29 ·

Techniques are provided for hosting a key value store. A persistent storage backend is used to centrally host a key value store as disaggregated storage shared with a plurality of clients over a network fabric. A network storage appliance is connected to the plurality of clients over the network fabric, and is configured with a key value store interface. The key value store interface is configured to receive a key value command from a client. The key value store interface parses the key value command to identify a translation layer binding for a key value store targeted by the key value command. The key value store interface translates the key value command into a key value operation using the translation layer binding, and executes the key value operation upon the key value store.

Systems and Methods for Fragmentation Management in Host Buffers
20220413751 · 2022-12-29 ·

Storage devices can be configured to utilize one or more memory buffers located within a host-computing device. These host buffers may allow for faster access to some data, including control pages. However, host buffers are susceptible to fragmentation issues similarly to standard user memory arrays. As the data stored within the host buffers becomes more fragmented, performance can suffer. This performance loss in storage devices becomes more pronounced as the desired performance levels of these storage devices increase. Therefore, various methods and systems described herein manage fragmentation within host buffers by conducting one or more operations. These operations may include locating a continuous portion of allocated or unallocated memory within the host buffer and either swap or copy high-usage or high-priority data to those continuous portions. When continuous portions of host buffer memory are not available, relevant portions of data may be cashed within the storage device to increase performance.

Data reading and writing processing from and to a semiconductor memory and a memory of a host device by using first and second interface circuits
11537291 · 2022-12-27 · ·

A device includes a host including a main memory, and semiconductor memory including a nonvolatile semiconductor memory, memory unit, and controller. The nonvolatile semiconductor memory stores first address information. The memory unit stores second address information as part of the first address information. The controller accesses the nonvolatile semiconductor memory based on the second address information. Third address information is stored in the main memory, and is part or all of the first address information. The controller uses the third address information when accessing the nonvolatile semiconductor memory if address information to be referred is not stored in the second address information.

Memory circuit and memory repair method thereof
11531471 · 2022-12-20 · ·

A memory circuit includes a first memory array and a second memory array. The first memory array and the second memory array are independent. The first memory array includes a plurality of general bits and the second memory array includes a plurality of spare bits. An address of defective bit in the first memory array is stored in the second memory array, and the memory circuit repairs the defective bit by one of the spare bits according to the address.

COMPRESSION DEVICE, COMPRESSION AND DECOMPRESSION DEVICE, AND MEMORY SYSTEM

A compression device includes an analyzer circuit, a control circuit, a compressor circuit, and a selector circuit. The analyzer circuit is configured to analyze first data that is input thereto and generate one or more parameter values regarding data compression and/or decompression. The control circuit is configured to generate at least one compression mode information indicating whether or not compression is to be performed, based on the one or more parameter values. The compressor circuit is configured to compress the first data into second data according to the compression mode information. The selector circuit is configured to output the first data if not compressed or the second data if the first data is compressed, together with the compression mode information.

FILE STORAGE SYSTEM AND MANAGEMENT INFORMATION FILE RECOVERY METHOD
20220398048 · 2022-12-15 · ·

In order to quickly recover a management information file, an Edge file storage stores user files and a management information file that manages management states of the user files in the Edge file storage. The Edge file storage manages operation logs indicating operation contents concerning user files accepted by nodes in association with the respective nodes. The Edge file storage extracts operation logs for a user file associated with a targeted management information file as a management information file stored in a failed node from the operation logs corresponding to the nodes. The Edge file storage aggregates operation logs that are extracted from the operation logs corresponding to the nodes and are used for the user file associated with the targeted management information file. The Edge file storage recovers the targeted management information file based on the aggregated operation log.

Managing write operations during a power loss

Exemplary methods, apparatuses, and systems include a memory controller detecting that an asynchronous power loss event has occurred. Upon determining that a write operation is in progress to a first type of non-volatile memory element, the memory controller cancels the write operation and retrieves data associated with the write operation. The memory controller sends a request for a second physical address pointing to a second type of non-volatile memory element. Upon receiving a second physical address corresponding to a logical address, the memory controller stores the data at the second physical address.