Phase-change memory cells and methods of manufacturing and operating phase-change memory cells are provided. In at least one embodiment, a phase-change memory cell includes a heater and a stack. The stack includes at least one germanium layer or a nitrogen doped germanium layer, and at least one layer of a first alloy including germanium, antimony, and tellurium. A resistive layer is located between the heater and the stack.

Disclosed herein is a semiconductor memory device. Provided is the semiconductor memory device includes a first device layer storing thermal energy and a second device layer being made of a material whose electrical properties are changed by the thermal energy, wherein the first device layer stores thermal energy if a voltage is applied to the second device layer. According to the present invention, since the device is composed of a material that is changed electrical characteristics by heat and a material that stores heat, it may be read as a current applied to the read voltage without applying other refresh voltage. In addition, there is no leakage current flowing through the device depending on the characteristics of the device, so additional circuit elements such as transistors and selectors are not required. The device has a fast-switching mechanism but does not cause leakage current thereby not showing resistance drift due to repetitive switching.

According to an embodiment, a phase-change memory device comprises: an upper electrode and a lower electrode; a phase-change layer in which a crystal state thereof is changed by heat supplied by the upper electrode and the lower electrode; and a selector which selectively switches the heat supplied by the upper electrode and the lower electrode to the phase-change layer, wherein the selector is formed of a compound which includes a transition metal in the phase-change material so as to have a high resistance when the crystalline state of the selector is crystalline and so as to have a low resistance when the crystalline state of the selector is non-crystalline.

A phase change memory device is provided. The phase change memory device includes a phase change memory material within an electrically insulating wall, a first heater terminal in the electrically insulating wall, and two read terminals in the electrically insulating wall.

In some embodiments, the present disclosure relates a phase change random access memory device that includes a phase change material (PCM) layer disposed between bottom and top electrodes. A controller circuit is coupled to the bottom and top electrodes and is configured to perform a first reset operation by applying a signal at a first amplitude across the PCM layer for a first time period and decreasing the signal from the first amplitude to a second amplitude for a second time period; and to perform a second reset operation by applying the signal at a third amplitude across the PCM layer for a third time period and decreasing the signal from the third amplitude to a fourth amplitude for a fourth time period greater than the second time period. After the fourth time period, the PCM layer has a percent crystallinity greater than the PCM layer after the second time period.

Phase-change memory cells and methods of manufacturing and operating phase-change memory cells are provided. In at least one embodiment, a phase-change memory cell includes a heater and a stack. The stack includes at least one germanium layer or a nitrogen doped germanium layer, and at least one layer of a first alloy including germanium, antimony, and tellurium. A resistive layer is located between the heater and the stack.

A semiconductor storage device includes at least a first electrode layer including a first material; and a memory layer including a second material having a high-resistance state and a low-resistance state switchable based on electric heating. The memory layer has a side surface covered by a side wall layer, the side wall layer including a third material with a higher melting temperature than the second material. The first material has an amorphous structure, a thermal conductivity at least 2-digits lower than a thermal conductivity of a single phase metal, and a resistivity equal to or lower than 50 mΩ.Math.cm and a positive temperature dependence.

In an approach for forming a nonvolatile tunable capacitor device, a first electrode layer is formed distally opposed from a second electrode layer, the first electrode layer configured to make a first electrical connection and the second electrode layer configured to make a second electrical connection. A dielectric layer is posited between the first electrode layer and adjacent to the second electrode layer. A phase change material (PCM) layer is posited between the first electrode layer and the second electrode layer adjacent to the dielectric layer. An energizing component is provided to heat the PCM layer to change a phase of the PCM layer. The energizing component may include a heating element or electrical probe in direct contact with the PCM layer, that when energized is configured to apply heat to the PCM layer. The phase of the PCM layer is changeable between an amorphous phase and a crystalline phase.

An approach to form a semiconductor structure with a multiple layer phase change material stack and four electrodes that functions as an integrated switch device. The semiconductor structure includes a sidewall spacer that is on two opposing sides of the multiple layer phase change material stack contacting an edge of each layer of the multiple layer phase change material stack. The semiconductor structure includes a pair of a first type of electrode, where each of the pair of the first type of electrode abuts each of the sidewall spacers on the two opposing sides of the multiple layer phase change material stack. A pair of a second type of electrode, where each of the second type of electrode abuts each of two other opposing sides of the multiple layer phase change material stack and contacts a heater material on outside portions of the multiple layer phase change material stack.

A thermally sensitive ionic redox transistor comprises a solid channel, a solid reservoir layer, and a solid electrolyte layer disposed between the channel and the reservoir layer. A conductance of the channel is varied by changing the concentration of ions such as oxygen vacancies in the channel layer. Ionic conductivity of the gate, electrolyte, and channel layers increase with increasing temperature. Ion or vacancy transport between the channel and the reservoir layer across the electrolyte layer occurs in response to applying a voltage between the channel and the reservoir layer when the device is heated to an elevated temperature. When the device is cooled below the elevated temperature, the ions are trapped in one or more of the layers because the materials lose their ionic conductivity. A state of the redox transistor can be read by measuring the conductance of the channel.