A technique manages data within a storage array. The technique involves forming a hybrid tier within the storage array, the hybrid tier including SSD storage and HDD storage. The technique further involves, after the hybrid tier is formed, providing hybrid ubers (or Redundant Array of Independent Disks (RAID) extents) from the SSD storage and the HDD storage of the hybrid tier. The technique further involves, after the hybrid ubers are provided, accessing the hybrid ubers to perform data storage operations.

Embodiments of the invention describe a system main memory comprising two levels of memory that include cached subsets of system disk level storage. This main memory includes “near memory” comprising memory made of volatile memory, and “far memory” comprising volatile or nonvolatile memory storage that is larger and slower than the near memory.

The far memory is presented as “main memory” to the host OS while the near memory is a cache for the far memory that is transparent to the OS, thus appearing to the OS the same as prior art main memory solutions. The management of the two-level memory may be done by a combination of logic and modules executed via the host CPU. Near memory may be coupled to the host system CPU via high bandwidth, low latency means for efficient processing. Far memory may be coupled to the CPU via low bandwidth, high latency means.

According to the embodiments, an external storage device switches to an interface controller for supporting only a read operation of nonvolatile memory when a shift condition for shifting to a read only mode is met. A host device switches to an interface driver for supporting only the read operation of the nonvolatile memory when determining to recognize as read only memory based on information acquired from the external storage device.

One example of a system includes a plurality of clients, a master chunk coordinator, and a plurality of chunk servers. Each client submits requests to access chunks of objects. The master chunk coordinator maintains chunk information for each object. Each chunk server includes a chunk monitor to monitor client requests, maintain chunk statistics for each chunk based on the monitoring, and transmit the chunk statistics for each chunk to the master chunk coordinator. The master chunk coordinator instructs the chunk servers to re-chunk objects, replicate chunks, migrate chunks, and resize chunks based on the chunk statistics to meet specified parameters.

In one example, a memory network may control access to a shared memory that is by multiple compute nodes. The memory network may control the access to the shared memory by receiving a memory access request originating from an application executing on the multiple compute nodes and determining a priority for processing the memory access request. The priority determined by the memory network may correspond to a memory address range in the memory that is specifically used by the application.

Provided are an apparatus and method for a non-power-of-2 size cache in a first level memory device to cache data present in a second level memory device having a 2.sup.n cache size. A request is to a target address having n bits directed to the second level memory device. A determination is made whether a target index, comprising m bits of the n bits of the target address, is within an index set of the first level memory device. A determination is made of a modified target index in the index set of the first level memory device having at least one index bit that differs from a corresponding at least one index bit in the target index. The request is processed with respect to data in a cache line at the modified target index in the first level memory device.

A mapping table updating method, a memory control circuit unit and a memory storage device are provided. The mapping table updating method includes: recording first mapping information as a mapping relation between a first virtual block and a first physical erasing unit; recording second mapping information as a mapping relation between the first virtual block and a second virtual block, and the second virtual block is mapped to the first physical erasing unit; and updating the second mapping information as a mapping relation between the first virtual block and a third virtual block if copying data belonging to the first physical erasing unit to a second physical erasing unit, and the third virtual block is mapped to the second physical erasing unit.

According to an embodiment, when a storage status of a first storage unit is recognized as a protected state, a control unit writes data to a second storage unit. When a read target address is recorded in a data migration log area, the control unit reads data from the second storage unit. When the read target address is not recorded in the data migration log area, the control unit reads data from the first storage unit.

This disclosure provides for improvements in managing multi-drive, multi-die or multi-plane NAND flash memory. In one embodiment, the host directly assigns physical addresses and performs logical-to-physical address translation in a manner that reduces or eliminates the need for a memory controller to handle these functions, and initiates functions such as wear leveling in a manner that avoids competition with host data accesses. A memory controller optionally educates the host on array composition, capabilities and addressing restrictions. Host software can therefore interleave write and read requests across dies in a manner unencumbered by memory controller address translation. For multi-plane designs, the host writes related data in a manner consistent with multi-plane device addressing limitations. The host is therefore able to “plan ahead” in a manner supporting host issuance of true multi-plane read commands.

The over-provisioning (OP) of a physical storage device (PSD) may be increased, and the useful life of the PSD increased, by converting uncompressed data stored on the PSD to compressed data. It may be determined that increasing the useful life of the PSD, and the data reduction resulting from the compression, outweigh the benefit of faster I/O response times if the data remains uncompressed. A first portion of the PSD may be initially reserved for compression. A second portion of the PSD may store compressed data. It may be determined whether it is desirable to increase the OP of the PSD to thereby reduce the effective write rate on the PSD. If compression is determined to be desirable, the dynamic portion may be compressed, thereby reducing the amount of storage space consumed by the data, and freeing up storage space that can be used by the PSD for OP.