G06F3/0611

AGGREGATING BLOCK MAPPING METADATA TO IMPROVE LINKED CLONE READ PERFORMANCE
20230023307 · 2023-01-26 ·

Linked clone read performance (e.g., retrieving data) is improved at least by minimizing the number of input/output (I/O) operations. For a child clone, a local logical extent and an inherited logical extent are generated. The local logical extent comprises a logical block address (LBA) for data in a data region of the child clone and a physical sector address (PSA) corresponding to the LBA for the data in the data region of the child clone. The inherited logical extent spans logical extents that are accessible to the child clone. The inherited logical extent comprises an LBA for data in a data region of an ancestor of the child clone and a corresponding identifier (ID) of the ancestor. Data for an LBA in a read request may be rapidly found in the child clone (local logical extent) or an ancestor (inherited logical extent).

PRIORITIZING READ IO QUEUES IN NON-VOLATILE MEMORY EXPRESS DEVICES
20230023568 · 2023-01-26 ·

Examples described herein relate to prioritizing read input/output (IO) queues in non-volatile memory express (NVME) storage devices. An NVME controller includes a host port, which may be associated with a host and communicate with NVME storage devices. A utilization time of the host port is determined. In response to determining that the utilization time of the host port is below a host port utilization threshold, the NVME controller may create a candidate list of NVME storage devices based on utilizations, throughputs, busy time periods, and IO request completions of the NVME storage devices. For each NVME storage device included in the candidate list, a number of read requests in a read IO queue at the NVME storage device may be determined. A priority rank may be assigned to the read IO queue at each NVME storage device based on the number of read requests in that read IO queue.

IO Request Flow Performance Analysis System and Method
20230025962 · 2023-01-26 ·

A method, computer program product, and computing system for executing a plurality of IO traces on a storage system. At least one vertical flow and at least one horizontal flow associated with the at least one vertical flow may be defined for the plurality of IO traces. A hierarchical representation of the plurality of IO traces may be generated with the at least one vertical flow and the at least one horizontal flow associated with the at least one vertical flow defined for the plurality of IO traces.

MEMORY DEVICE PERFORMING IN-MEMORY OPERATION AND METHOD THEREOF

Disclosed is a memory device including a plurality of memory banks, each of which performs an operation based on first operand data including pieces of first unit data and second operand data including pieces of second unit data and a processing in-memory interface unit (PIM IU) that delivers signals for an operation request to the plurality of memory banks. Each of the plurality of memory banks includes a memory cell array configured to store one of the pieces of first unit data and a PIM engine that reads the one of the pieces of first unit data from the memory cell array, reads the pieces of second unit data broadcast to the plurality of memory banks, and generates an operation result by performing an operation based on the one of the pieces of first unit data and the pieces of second unit data.

MEMORY MODULE

In a memory module according to an embodiment of the present disclosure, a controller, upon reception of a read command including a logical address, converts the logical address included in the read command into a physical address using address lookup information. The controller further inputs a first physical address, which is a portion of the physical address obtained by the conversion, to a non-volatile memory via a first address bus terminal, and then inputs a second physical address, which is a rest of the physical address obtained by the conversion, to the non-volatile memory via a second address bus terminal, to thereby read data corresponding to the physical address obtained by the conversion from the non-volatile memory.

SYSTEMS AND METHODS FOR POWER RELAXATION ON STARTUP
20230229217 · 2023-07-20 ·

A storage unit is disclosed. The storage unit may include an interface to a host and storage for a data. A receiver may receive from a host a boot power data. The boot power data may including a first power level and a duration. A circuit may boot the storage unit based at least in part on the boot power data. The storage unit may include a second power level, with the first power level greater than the second power level.

FLASH MEMORY SCHEME CAPABLE OF DECREASING WAITING TIME OF TRIM COMMAND
20230229312 · 2023-07-20 · ·

A method of a flash memory controller used to be externally coupled to a host device and a flash memory, comprising: providing a multi-processor having a plurality of processing units; receiving a trim command and a logical block address (LBA) range sent from the host device; separating multiple operations of the trim command into N threads according to at least one of a number of the processing units, types of the multiple operations, numbers of execution cycles of the multiple operations, and portions of the LBA range; using the processing units to execute the N threads individually; and maximizing a number of execution cycles during which the processing units are busy.

INTELLIGENT FILE SYSTEM WITH TRANSPARENT STORAGE TIERING

A file system manager implemented at a provider network identifies a storage device of a first group of storage devices of a provider network as an initial location of a file system object. Based on an access metric associated with the object, the file system manager initiates a transfer of contents of the object to a second storage device of a different storage device group, without receiving a client request specifying the transfer. In response to an access request received via a file system programmatic interface, contents of the object are provided from the second storage device. Based on a second access metric, the object is transferred back to the first group of storage devices.

Memory controller

The present disclosure includes apparatuses and methods related to a memory controller, such as a host memory controller. An example apparatus can include a host memory controller coupled to a first memory device and a second memory device via a channel, wherein the host memory controller is configured to send a first number of commands to the first memory device using a first device select signal, and send a second number of commands to the second memory device using a second device select signal.

CONTAINER-BASED CLOUD SERVICE PROVIDING SYSTEM AND METHOD THEREFOR

A container-based cloud service providing system of the present disclosure includes an access server network-connected to a plurality of user terminals through a web socket; an in-memory duster having an area allocated in a cloud and storing an authentication key and event data based on a container; a server module providing a cloud service to the user terminal; a manager module managing the server module; and a database. The server module includes a security module having a container structure and performing authentication of the user terminal; a data storage module having a container structure and periodically storing the event data stored in the in-memory cluster in the database; and a service module providing the cloud service by using the event data.