A storage system includes a switch and a plurality of storage nodes. The switch is configured to receive a first request from a client. The first request includes an identifier of a storage partition. The switch queries an entry in a forwarding table based on the identifier to determine a target storage node in the plurality of storage nodes. The entry includes a mapping relationship between the identifier and the target storage node. The switch sends the first request to the target storage node. The target storage node is configured to receive the first request from the switch.

Methods and systems provided herein involve extracting an input/output (I/O) operation from a packet received over an I/O pipeline, the I/O operation comprising either a read request to read data from at least one storage device or a write request to write data to the at least one storage device; determining that an address associated with the I/O operation exists in a lookup table that is provided for thin provisioning of the at least one storage device; performing one or more RAID calculations associated with the at least one storage device based on the address and the I/O operation; and accessing the at least one storage device to perform the I/O operation based on the one or more RAID calculations; and second processing component configured to carry out a second set of operations that occur when the address associated with the I/O operation does not exist in the lookup table.

In response to the problems and scenarios described above, Solid State Drive (SSD) devices with hardware accelerators and methods for apportioning storage resources in the SSD are disclosed. SSDs typically comprise an array of non-volatile memory devices and a controller which manages access to the memory devices. The controller may also comprise one or more accelerators to either improve the performance of the SSD itself or to offload specialized computation workloads of a host-computing device. Different accelerators may be dynamically assigned portions of the non-volatile memory array according to the type of data being accessed and/or the throughput required. Provision is also made for the data to be accessed directly by the accelerators bypassing the controller.

Provided is a system and method for storing, via a processor, in a memory of an application specific integrated circuit (ASIC), one or more threshold values responsive to at least one of physical layer and processing layer operating conditions of the ASIC. Also included is monitoring at least one of a physical layer operating condition value and a processing layer performance condition value of the ASIC, the moderating forming a monitored value, comparing the monitored value with the stored threshold values, and throttling processing layer performance of the ASIC when the monitored value exceeds at least one of the stored threshold values.

According to one embodiment, in response to receiving, from a host, one or more second type commands, a controller of the storage device maintains the received one or more second type commands in a memory region in the storage device without completing processing of the received one or more second type commands. In response to receiving the first type command from the host, the controller completes processing of a second type command, and transmits a command completion response for the first type command to the host as a first preceding response for the first type command. In response to completion of processing of the first type command, the controller transmits a command completion response for the first type command to the host.

A dynamic random access memory employs either or both of a normal row copy operation or a fast row copy operation to copy selected data from a first row of memory to a second row of memory, without transferring the data to an intermediary processor such as a central processing unit or a memory controller. Both operations depend on a concurrent electrical activation of two separate wordlines within a bank of a DRAM. For the fast row copy operation, the two separate wordlines are part of a shared section of a DRAM bank, having shared bitlines. Bit values are copied directly in parallel via common bitlines. For the normal row copy operation, the two separate wordlines are part of a common bank but not a shared section. Bit values are copied in serial via a general input/output bus within the bank.

A memory device is provided. The memory device comprises a memory cell array configured to store data, a command decoder configured to receive a command from the exterior to generate a first memory cell control signal, a PIM (Processor In Memory) block configured to generate a second memory cell control signal including a command for performing an internal processing operation on the basis of instructions stored therein and perform an internal processing operation on the basis of the second memory cell control signal, and an operating mode multiplexer configured to output any one of the first memory cell control signal and the second memory cell control signal and provide it to the memory cell array.

A memory access speed adjustment method, control device and memory module are provided. The method is for use in controlling a controller of a memory and includes steps of: obtaining a current temperature value of the memory; determining an access speed threshold of the memory according to a continuous variation relation with respect to a difference between the current temperature value and a target temperature value; and adjusting, by the controller, an access speed of the memory according to the access speed threshold.

Techniques for managing disks involve determining performance information of an access pattern of a disk slice based on differences in performance parameters of the access pattern of the disk slice on a plurality of disks. Such techniques further involve determining a score for the disk slice based on the performance information and access frequency information of the disk slice. Such techniques further involve determining a position of the disk slice in the plurality of disks based on the score.

Methods, apparatus, and processor-readable storage media are provided herein for storage volume creation using performance volumes and capacity volumes. An example computer-implemented method includes configuring a storage system with at least first and second storage tiers each comprising a plurality of storage devices; creating a virtual storage volume having a first portion corresponding to at least a portion of the plurality of storage devices of the first storage tier and a second portion corresponding to at least a portion of the plurality of storage devices of the second storage tier; and processing input-output requests from one or more host devices associated with the virtual storage volume, wherein the processing comprises moving data between the first portion and the second portion of the virtual storage volume so that each of the input-output requests is processed using the first portion of the virtual storage volume.