A determination is made by a processing device included in a memory component that an operation to program data to a location in the memory component has failed, the data is programmed to a different location in the memory component by the processing device upon determining the operation has failed, and a notification that the data has been programmed to the different location in the memory component is provided by the processing device to a processing device operatively coupled to the memory component.

According to one embodiment, a controller of a memory system performs a first operation a plurality of times for each of a plurality of first blocks. The first operation includes a write operation for writing data in a first write mode for writing m-bit data per memory cell and a data erase operation. While a second block is not a defective block, the controller performs a second operation a plurality of times for the second block. The second operation includes a write operation for writing data in a second write mode for writing n-bit data per memory cell and a data erase operation. When the second block is a defective block, the controller selects a first block from the plurality of first blocks, and writes second write data to the selected first block in the second write mode.

A data recovery method, an apparatus, and a solid state drive are provided. The method includes: copying, after an abnormality occurs in the solid state drive, memory data of a first memory space to a solidified area of a second memory space, and then writing address information of the solidified area to a third memory space; recovering, after a controller is reset for the first time, the memory data of the first memory space according to the address information of the solidified area; flushing data of the second memory space into a flash memory space according to the recovered memory data of the first memory space; and performing, after the controller is reset for the second time, data recovery on the solid state drive according to memory data of the flash memory space.

According to one embodiment, a controller of a memory system reorders a plurality of first write commands in an order in which writing within a first zone is executed sequentially from a next write location within the first zone. The controller transfers a plurality of write data associated with the plurality of first write commands reordered from a write buffer of a host to an internal buffer in a same order as the order of the plurality of first write commands reordered, and writes the plurality of write data transferred to the internal buffer to a first storage region managed as the first zone.

An operation method of a storage device, which includes a nonvolatile memory device, includes receiving a first key-value (KV) command including a first key from an external host device; transmitting a first value corresponding to the first key from the nonvolatile memory device to the external host device as first user data, in response to the first KV command; receiving a second KV command including a second key, from the external host device; and performing a first administrative operation based on a second value corresponding to the second key, in response to the second KV command. The first KV command and the second KV command are KV commands of a same type.

Examples of electronic devices are described herein. In some examples, an electronic device includes a flash memory. In some examples, the electronic device includes a host memory to store an access control structure to access the flash memory. In some examples, the electronic device includes a first circuitry coupled to the host memory and the flash memory. In some examples, the first circuitry is to read the access control structure in the host memory to determine when to access the flash memory.

Methods, systems, and devices for optimized command sequences are described. An apparatus includes a memory array and a controller coupled with the memory array. The controller may be configured to receive a first command indicating a start of a sequence of access commands to store at the controller, then receive a first set of access commands associated with the sequence of access commands, and then receive a second command indicating the end of the sequence of access commands. The controller may also receive a second set of access commands after the command. The controller may execute an operation associated with a third set of access commands of the sequence after receiving the second set of access commands and before receiving the third set of access commands based at least in part on identifying the second set of access commands as starting the sequence of access commands.

A memory storage system comprising a non-volatile semiconductor memory device comprising a memory array and a plurality of buffers, and a controller in communication with the plurality of buffers. The controller may be configured to issue a command to the non-volatile semiconductor memory device to cause a transfer of a data payload from the controller to a subset of n first buffers of the plurality of buffers. The controller may also be configured to issue a command to the non-volatile semiconductor memory device to cause the non-volatile memory device to transfer a data payload from the memory array to a subset of n first buffers of the plurality of buffers.

A memory system includes a plurality of memory groups capable of performing a data input/output operation, and a controller configured to divide an operation subject to a data input/output command into at least one unit operation corresponding to the plurality of memory groups, and assign the at least one unit operation to plural queues corresponding to the respective memory groups, based on first information regarding operation statuses of the plurality of memory groups and second information regarding available resources.

A method, apparatus, and system for processing Redundant Array of Independent Disks (RAID) Input/Output (I/O) requests for a plurality of nodes in a cluster is disclosed. A file system request including a byte offset is received. Then, a Physical Extent (PE) row that matches the file system request and a RAID stripe within the identified PE row based on the byte offset is identified. Next, a plurality of RAID I/O requests to be routed to a physical disk is generated. Each of the plurality of the RAID I/O requests includes information associated with the PE and a type of operation. Thereafter, each of the RAID I/O requests is processed based on the information associated with the PE and the type of operation.