A memory module comprises a volatile memory subsystem, a non-volatile memory subsystem, and a module controller coupled to the volatile memory subsystem and to the non-volatile memory subsystem. The module controller is configurable to control data transfers between the volatile memory subsystem and the non-volatile memory subsystem. The module controller includes a data selection circuit configurable to pre-search data transferred from the non-volatile memory with respect to one or more search criteria before providing the pre-select data relevant to the one or more search criteria to the volatile memory subsystem.

A storage device and a method for operating the storage device efficiently manage the data stored in an internal memory and the parity for the data in a storage device.

A system including a machine learning processing device and a memory device with microbumps is disclosed. A machine learning processing device is for performing a machine learning operation, where the machine learning processing device includes a first set of microbumps. A memory device is for storing data for the machine learning operation, where the memory device includes a second set of microbumps. The first set of microbumps of the memory device are coupled with the second set of microbumps of the machine learning processing device. The first set of microbumps of the memory device and the second set of microbumps of the machine learning processing device are to transmit the data for the machine learning operation.

An operation method of a storage device, which includes a nonvolatile memory device, includes receiving a first key-value (KV) command including a first key from an external host device; transmitting a first value corresponding to the first key from the nonvolatile memory device to the external host device as first user data, in response to the first KV command; receiving a second KV command including a second key, from the external host device; and performing a first administrative operation based on a second value corresponding to the second key, in response to the second KV command. The first KV command and the second KV command are KV commands of a same type.

A processing-in-memory (PIM) system includes a PIM device and a controller. The PIM device includes a data storage region and an arithmetic circuit for performing an arithmetic operation for data outputted from the data storage region. The controller is configured to control the PIM device. The PIM device is configured to transmit arithmetic quantity data of the arithmetic circuit to the controller in response to a request of the controller.

According to one embodiment, while a memory card is in a second operation mode, a host controller monitors a reset signal for the second operation mode and detects that an error occurs in the second operation mode in the condition that a period of time during which both a card presence signal and the reset signal are asserted continues for a first period of time or longer. The host controller generates a first interrupt signal for starting a first driver in response to the detection of the occurrence of the error. The first driver, when started by the first interrupt signal, changes the operation mode of the memory card from the second operation mode to a first operation mode by controlling the host controller.

Techniques are directed to managing Redundant Array of Independent Disks (RAID) storage space. One technique involves providing, by RAID circuitry, a storage space request to mapper circuitry; receiving, by the RAID circuitry, a storage space reply from the mapper circuitry in response to the storage space request; and performing, by the RAID circuitry, a follow-up operation based on the storage space reply from the mapper circuitry. Another technique involves, receiving, by mapper circuitry, a storage space request from RAID circuitry; performing, by the mapper circuitry, a storage space management operation in response to the storage space request; and providing, by the mapper circuitry, a storage space reply to the RAID circuitry, the storage space reply identifying a result of the storage space management operation.

Various implementations described herein relate to systems and methods for predicting and managing drive hazards for Solid State Drive (SSD) devices in a data center, including receiving telemetry data corresponding to SSDs, determining future hazard of one of those SSDs based on an a-priori model or machine learning, and causing migration of data from that SSD to another SSD.

A method of operating a storage system is disclosed. The method includes determining a storage cluster among storage arrays of the storage system. Each storage array includes at least two controllers and at least one storage shelf. The at least two controllers are configured to function as both a primary controller for a first storage array and a secondary controller for a second storage array.

Examples of the present disclosure relate to a device, method, and medium storing instructions for execution by a processor for refreshing memory blocks of solid state memory through a temperature compensated refresh rate. Techniques discussed herein include a solid state memory to store data and a temperature sensor to identify a temperature of the solid state memory. The memory device with solid state memory also includes a memory controller that periodically refreshes memory blocks of the solid state memory at an adjustable refresh rate, wherein memory controller is to adjust the adjustable refresh rate based on the temperature of the solid state memory.