Systems, apparatuses, and methods for performing efficient memory accesses for a computing system are disclosed. In various embodiments, a computing system includes one or more computing resources and a memory controller coupled to a memory device. The memory controller determines a memory access request targets a given bank of multiple banks. An access history is updated for the given bank based on whether the memory access request hits on an open page within the given bank and a page hit rate for the given bank is determined. The memory controller sets an idle cycle limit based on the page hit rate. The idle cycle limit is a maximum amount of time the given bank will be held open before closing the given bank while the bank is idle. The idle cycle limit is based at least in part on a page hit rate for the bank.

A method is performed by a first server on a chip (SoC) node that is one instance of a plurality of nodes within a cluster of nodes. An operation is performed for determine if a second one of the SoC nodes in the cluster has data stored thereon corresponding to a data identifier in response to receiving a data retrieval request including the data identifier. An operation is performed for determining if a remote memory access channel exists between the SoC node and the second one of the SoC nodes. An operation is performed for access the data from the second one of the SoC nodes using the remote memory access channel after determine that the second one of the SoC nodes has the data stored thereon and that the remote memory access channel exists between the SoC node and the second one of the SoC nodes.

Apparatuses and methods can be related to supplementing AI processing in memory. An accelerator and/or a host can perform AI processing. Some of the operations comprising the AI processing can be performed by a memory device instead of by an accelerator and/or a host. The memory device can perform AI processing in conjunction with the host and/or accelerator.

According to one embodiment, a memory system includes a controller which controls garbage collection for preparing one or more free blocks by writing valid data read from N blocks to one or more blocks of less than the N. The controller calculates a performance ratio between writing of data in response to a request from a host device and writing of data for the garbage collection in accordance with a data writable capacity remaining in a nonvolatile memory, calculates an average performance ratio from calculated performance ratios of M generations including a calculated latest performance ratio, and adjusts a performance cycle of the garbage collection by applying one of the calculated latest performance ratio and the calculated average performance ratio.

According to one embodiment, a memory system includes a nonvolatile semiconductor memory device, controller, memory, wireless communication function section, and extension register. The controller controls the nonvolatile semiconductor memory device. The memory is serving as a work area of the controller. The wireless communication module has a wireless communication function. The extension register is provided in the memory. The controller processes a first command to read data from the extension register, and a second command to write data to the extension register. The extension register records, an information specifying the type of the wireless communication function in a specific page, and an address information indicating a region on the extension register to which the wireless communication function is assigned.

A data storage device and method for efficient image searching are provided. In one embodiment, a data storage device is provided comprising a memory and a controller. The controller is configured to store a plurality of images and a plurality of keys in the memory, wherein each key of the plurality of keys is generated from a respective image of the plurality of images; receive, from a host, a key generated from a target image desired by the host; and return, to the host, an image from the stored plurality of images that is associated with a key that matches the key received from the host. Other embodiments are provided.

According to some example embodiments according to the present disclosure, a device includes a printed circuit board (PCB); a solid state drive (SSD) connected at a first side of the PCB via at least one SSD connector; at least one field programmable gate array (FPGA) attached to the PCB at a second side of the PCB; and at least one front end connector attached to the PCB at a third side of the PCB, wherein the device is configured to process data stored in the SSD based on a command received via the at least one front end connector.

A backup data storage system includes non-volatile memory units, a disk interface coupled to at least some of the non-volatile memory units, a connection component that facilitates exchanging data with the backup data storage system, and a smart network interface controller, coupled to the disk interface and the connection component to provide tape emulation to a host coupled to the backup data storage system. The disk interface, the connection component, and the smart network interface controller may be coupled using a PCIe bus. Tape data written to the backup storage device may be stored on the non-volatile memory units. A processor coupled to the smart network interface controller and the disk interface may receive the data from the smart network interface controller and may provide the data to the disk interface to store the data on the non-volatile memory units. The connection component may be a FICON connection component.

A data storage device includes a storage including a buffer zone and a data zone and a controller for exchanging data with the storage by allocating at least one zone namespace (ZNS) in the data zone, a ZNS being a data storage region that is physically and logically divided and allocated to each of application programs driven in a host. The controller opens one or more sub buffer zones in the buffer zone, divides write data from the host into one or more segments respectively corresponding to sizes of the one or more sub buffer zones, buffers each of the one or more segments in a corresponding one of the one or more sub buffer zones, opens a ZNS corresponding to a length of the write data in the data zone, and migrates the one or more segments buffered in the sub buffer zones to the opened ZNS.

A storage device includes a memory device, and a memory controller configured to receive data and a log related to a property of the data from an external host, allocate a super block in which the data in the memory device is to be stored and a physical zone in the super block based on the log of the data, and store information for the log of the data stored for each physical zone and a time point at which a physical zone of a full state in which an empty area does not exist is switched to the full state. The memory controller controls the memory device to perform garbage collection according to the number of physical zones of an empty state, and selects a victim physical zone based on the information for the log of the data and a full state switch time point.