Representative apparatus, method, and system embodiments are disclosed for configurable computing. A representative system includes an asynchronous packet network; a plurality of configurable circuits arranged in an array, each configurable circuit coupled to the asynchronous packet network and adapted to perform a plurality of computations; and a dispatch interface circuit adapted to partition the plurality of configurable circuits into one or more separate partitions of configurable circuits and to load one or more computation kernels into each partition of configurable circuits. The dispatch interface circuit may load balance across the partitions of configurable circuits by starting threads for execution in the partition having the highest number of available thread identifiers. The dispatch interface may also assert a partition enable signal to merge the one or more separate partitions and assert a stop signal to all configurable circuits of the one or more separate partitions of configurable circuits.

Sideband signaling in Universal Serial Bus (USB) Type-C communication link allows multiple protocols that are tunneled through a USB link, where sideband signals may be provided through the sideband use (SBU) pins. Further, the SBU pins may be transitioned between different modes of sideband signals. In particular, signals in an initial mode may indicate a need or desire transition to a second mode. After a negotiation, linked devices agree to transition, the two devices may transition to the second mode. By providing this inband sideband signaling that allows mode changes, more protocols can be tunneled with accompanying sideband signaling and flexibility of the USB link is expanded.

An adapter is provided that includes a first interface to couple to a particular device, where link layer data is to be communicated over the first interface, and a second interface to couple to a physical layer (PHY) device. The PHY device includes wires to implement a physical layer of a link, and the link couples the adapter to another adapter via the PHY device. The second interface includes a data channel to communicate the link layer data over the physical layer, and a sideband channel to communicate sideband messages between the adapter and the other adapter over the physical layer. The adapter is to implement a logical PHY for the link.

An encapsulation block for a digital signal processing (DSP) block. The encapsulation block includes DSP block having an input terminal, an output terminal, and an input clock. The encapsulation block also includes pacing control network operatively connected with the input terminal, the output terminal, and the input clock of the DSP block. The input terminal of the DSP block is configured to receive a samples-in data stream inputted at a predefined clock period defined by the input clock. The output terminal of the DSP block is configured to receive a samples-out data stream outputted at a predefined paced parameter. The pacing control network is configured to control data flow at the samples-in data stream and the samples-out data stream independently of the DSP block.

A system-on-chip (SoC) may include a master, a slave, and an asynchronous interface having a first first-in first-out (FIFO) memory connected to the master and the slave. A write operation of the FIFO memory is controlled based upon a comparison of a write pointer and an expected write pointer of the FIFO memory, and a read operation of the FIFO memory is controlled based upon a comparison of a read pointer and an expected read pointer of the FIFO.

A port of a computing device includes protocol circuitry to implement a particular interconnect protocol, where the protocol circuitry is to generate a set of ordered sets defined according to the particular interconnect protocol. The set of ordered sets is generated for a link to couple a first device to a second device and the set of ordered sets comprises link information for the link. Translation layer circuitry is provided to: generate, from the set of ordered sets, at least one data structure to comprise at least a portion of the link information, and cause the data structure to be sent from the first device to the second device on the link in lieu of the set of ordered sets.

The present invention provides an apparatus for expanding a serial communication port. The apparatus includes a first serial port, a second serial port and a processing and control module. The first serial port is used to transmit a first signal, and the second serial port is used to transmit a second signal. The processing and control module is coupled between the first serial port and the second serial port. The processing and control module includes a first serial bus host controller, a second serial bus host controller, a data forwarding unit and an expansion unit. The apparatus is connected between an electronic device and multiple peripheral devices, so that via the expansion unit, each peripheral device generates its own communication port on the electronic device.

Methods, systems, and computer program products are described herein an extensible input stack for processing input device data received from a plurality of different input devices attached to a computing device. The extensible input stack comprises a plurality of stack layers. Each of the plurality of stack layers performs a particular set of processing with respect to the input device data, among other operations. Each of the plurality of stack layers comprises a code interface, which is used to provide and/or or receive data from the input device and/or other stack layers. Each of the stack layers is extensible to include additional functionality to support new input devices. By separating out the functionality performed by the input stack into separate stack layers, and having each layer accessible via a code interface, the functionality of each of stack layers may be easily extended to support any type of input device.

Methods, systems, and computer program products are described herein an extensible input stack for processing input device data received from a plurality of different input devices attached to a computing device. The extensible input stack comprises a plurality of stack layers. Each of the plurality of stack layers performs a particular set of processing with respect to the input device data, among other operations. Each of the plurality of stack layers comprises a code interface, which is used to provide and/or or receive data from the input device and/or other stack layers. Each of the stack layers is extensible to include additional functionality to support new input devices. By separating out the functionality performed by the input stack into separate stack layers, and having each layer accessible via a code interface, the functionality of each of stack layers may be easily extended to support any type of input device.

A method for sensing cable insertion into a connection installed in an electronic device. The electronic device includes a connector for inserting a cable, a first power manager configured to, when power is provided from the cable, output a signal corresponding to the power, a second power manager configured to transmit information instructing a supplying of the power to a processor, in accordance with the output of the signal, and the processor configured to control opening a path for the cable in accordance with the information.