Systems and method for aligning components of photonic systems are provided. An optical component for integration into and optical coupling within a photonic system is created by separating the component from a substrate to form a precisely defined surface on the optical component, the surface being precisely spaced from an optical feature of the component to be optically coupled within the photonic system. The precisely defined surface of the optical component is then pressed against a reference surface to position the optical feature in a predefined position and/or orientation for optical coupling of the optical feature within the photonic system. Passive precise alignment and optical coupling is thus provided without the need for iterative readjustment, multi-axis feedback, or active feedback.

A bonded structure comprises a substrate component having a plurality of first pads arranged on or within a surface of the substrate component, and an integrated circuit component having a plurality of second pads arranged on or within a surface of the integrated circuit component. The bonded structure further comprises a plurality of connection elements physically connecting the first pads to the second pads. The surface of the integrated circuit component is tilted obliquely to the surface of the substrate component at a tilt angle that results from nominal variations of surface sizes of the first and second pads.

A hybrid integration method includes: assembling a motherboard chip, assembling a daughterboard chip, and assembling an integrated chip. The motherboard chip includes a motherboard chip body, a first metal region, a first vertical support assembly, and a first waveguide region arranged on the motherboard chip body, and the first waveguide region includes a first conventional waveguide region and a first coupling waveguide region used for vertical coupling which are fixedly connected to each other; the daughterboard chip includes a daughterboard chip body, a second metal region, a second vertical support assembly and a second waveguide region arranged on the daughterboard chip body, and the second waveguide region includes a second conventional waveguide region and a second coupling waveguide region used for vertical coupling which are fixedly connected to each other.

The application provides a connector device for connecting at least one optical fiber endpiece to an electric terminal. The connector device comprises a printed circuit board and an electric connector plug connectable to an electric terminal. A fiber end piece holder is mounted or mountable in an orientation enabling light propagation parallel to the printed circuit board, whereas an optoelectronic chip comprising optoelectronic active elements enables emission and/or detection of light substantially normal to the printed circuit board. A layered optical stack is provided on the printed circuit board, which layered optical stack comprises a reflection surface for changing the propagation direction between parallel and normal to the printed circuit board.

There is set forth herein an optoelectrical device, comprising: a substrate; an interposer dielectric stack formed on the substrate, the interposer dielectric stack including a base interposer dielectric stack, a photonics device dielectric stack, and a bond layer that integrally bonds the photonics device dielectric stack to the base interposer dielectric stack. There is set forth herein a method comprising building an interposer base structure on a first wafer having a first substrate, including fabricating a plurality of through vias in the first substrate and fabricating within an interposer base dielectric stack formed on the first substrate one or more metallization layers; and building a photonics structure on a second wafer having a second substrate, including fabricating one or more photonics devices within a photonics device dielectric stack formed on the second substrate.

Microelectronic assemblies including photonic integrated circuits (PICs), related devices and methods, are disclosed herein. For example, in some embodiments, a photonic assembly may include an integrated circuit (IC) in a first layer, wherein the first layer includes a substrate having a first surface, an opposing second surface, and a lateral surface substantially perpendicular to the first and second surfaces, wherein the substrate includes a waveguide between the first and second surfaces, and wherein and the IC is nested in a cavity in the substrate; a PIC in a second layer, wherein the second layer is on the first layer and an active surface of the PIC faces the first layer, and wherein the IC is electrically coupled to the active side of the PIC; and an optical component optically coupled to the active surface of the PIC and the waveguide in the substrate at the second surface.

Optical ports providing passive alignment connectivity are disclosed. In one embodiment, an optical port includes a substrate having a surface, a photonic silicon chip, a connector body, and a plurality of spacer elements. The photonic silicon chip includes an electrical coupling surface, an upper surface and an optical coupling surface. The optical coupling surface is positioned between the electrical coupling surface and the upper surface. The photonic silicon chip further includes at least one waveguide terminating at the optical coupling surface, and a chip engagement feature disposed on the upper surface. The connector body includes a first alignment feature, a second alignment feature, a mounting surface, and a connector engagement feature at the mounting surface. The connector engagement feature mates with the chip engagement feature. The plurality of spacer elements is disposed between the electrical coupling surface of the photonic silicon chip and the surface of the substrate.

For optical communications between semiconductor ICs, optical transceiver assembly subsystems may be integrated with a processor. The optical transceiver assembly subsystems may be monolithically integrated with processor ICs or they may be provided in separate optical transceiver ICs coupled to or attached to the processor ICs.

An optical transceiver comprises a transmitter and a receiver housed in a transistor outline (TO) can. The receiver comprises a first submount comprising at least one waveguide, a photodiode coupled to the first submount and the at least one waveguide, and a transimpedance amplifier (TIA) coupled to the first submount and the at least one waveguide, wherein the at least one waveguide couples the photodiode to the TIA, wherein the at least one waveguide is positioned on the first submount in between the photodiode and the TIA.

A semiconductor device includes a first chip, a dielectric layer over the first chip, and a second chip over the dielectric layer. A conductive layer is embedded in the dielectric layer and is electrically coupled to the first chip and the second chip. The second chip includes an optical component. The first chip and the second chip are arranged on opposite sides of the dielectric layer in a thickness direction of the dielectric layer.