Patent classifications
G02B6/4232
Semiconductor device with nanostructures aligned with grating coupler and manufacturing method thereof
A semiconductor device includes a photonic die and an optical die. The photonic die includes a grating coupler and an optical device. The optical device is connected to the grating coupler to receive radiation of predetermined wavelength incident on the grating coupler. The optical die is disposed over the photonic die and includes a substrate with optical nanostructures. Positions and shapes of the optical nanostructures are such to perform an optical transformation on the incident radiation of predetermined wavelength when the incident radiation passes through an area of the substrate where the optical nanostructures are located. The optical nanostructures overlie the grating coupler so that the incident radiation of predetermined wavelength crosses the optical die where the optical nanostructures are located before reaching the grating coupler.
Optoelectronic devices and wavelength-division multiplexing optical connectors
Example implementations relate to mounting optoelectronic devices and wavelength-division multiplexing optical connectors. For example, an implementation includes a transparent interposer having an integrated plurality of lenses. A plurality of optoelectronic devices are mounted to a bottom surface of the transparent interposer, each of the optoelectronic devices being paired to a respective lens of the plurality of lenses. The bottom surface of the transparent interposer is mounted to a substrate within a region of an optical socket. The optical socket receives a filter-based wavelength-division multiplexing (WDM) optical connector. Each lens of the plurality of lenses is paired to a respective filter of the WDM optical connector when the WDM optical connector is mated to the optical socket.
Photonic interface for electronic circuit
A photonic interface for an electronic circuit is disclosed. The photonic interface includes a photonic integrated circuit having a modulator and a photodetector, and an optical fiber or fibers for optical communication with another optical circuit. A modulator driver chip may be mounted directly on the photonic integrated circuit. The optical fibers may be placed in v-grooves of a fiber support, which may include at least one lithographically defined alignment feature for optical alignment to the silicon photonic circuit.
INTEGRATED CIRCUIT PACKAGES INCLUDING AN OPTICAL REDISTRIBUTION LAYER
Disclosed is a package comprising a substrate having a patterned surface with an optical contact area, an optical redistribution layer (oRDL) feature, and a build-up material extending over the patterned surface of the substrate and around portions of the oRDL features. In some embodiments, the package comprises a liner sheathing the oRDL features. In some embodiments, the oRDL feature extends through openings in an outer surface of the build-up material and forms posts extending outward from the outer surface. In some embodiments, the package comprises an electrical redistribution layer (eRDL) feature, at least some portion of which overlap at least some portion of the oRDL feature. In some embodiments, the package comprises an optical fiber coupled to the oRDL features.
TECHNIQUES FOR LASER ALIGNMENT IN PHOTONIC INTEGRATED CIRCUITS
Techniques for efficient alignment of a semiconductor laser in a Photonic Integrated Circuit (PIC) are disclosed. In some embodiments, a photonic integrated circuit (PIC) may include a semiconductor laser that includes a laser mating surface, and a substrate that includes a substrate mating surface. A shape of the laser mating surface and a shape of the substrate mating surface may be configured to align the semiconductor laser with the substrate in three dimensions.
Wafer level packaged optical subassembly and transceiver module having same
An optical subassembly includes: a TSV submount layer carrying an active optical component and a sandwich cap bonded to the TSV submount layer. The sandwich cap includes a bottom spacer layer disposed above the TSV submount layer, a glass layer above the bottom spacer layer, and an upper spacer layer above the glass layer. A cavity is defined in the bottom spacer layer and configured for accommodating the active optical component. At least one first lens is formed on the glass layer and is opposite to the active optical component. An alignment feature is formed in the upper spacer layer.
SEMICONDUCTOR DEVICE WITH NANOSTRUCTURES ALIGNED WITH GRATING COUPLER AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a photonic die and an optical die. The photonic die includes a grating coupler and an optical device. The optical device is connected to the grating coupler to receive radiation of predetermined wavelength incident on the grating coupler. The optical die is disposed over the photonic die and includes a substrate with optical nanostructures. Positions and shapes of the optical nanostructures are such to perform an optical transformation on the incident radiation of predetermined wavelength when the incident radiation passes through an area of the substrate where the optical nanostructures are located. The optical nanostructures overlie the grating coupler so that the incident radiation of predetermined wavelength crosses the optical die where the optical nanostructures are located before reaching the grating coupler.
Optically aligned hybrid semiconductor device and method
Two semiconductor chips are optically aligned to form a hybrid semiconductor device. Both chips have optical waveguides and alignment surface positioned at precisely-defined complementary vertical offsets from optical axes of the corresponding waveguides, so that the waveguides are vertically aligned when one of the chips is placed atop the other with their alignment surface abutting each other. The position of the at least one of the alignment surface in a layer stack of its chip is precisely defined by epitaxy. The chips are bonded at offset bonding pads with the alignment surfaces abutting in the absence of bonding material therebetween.
OPTICAL TRANSCEIVER BY FOWLP AND DOP MULTICHIP INTEGRATION
An optical transceiver by hybrid multichip integration. The optical transceiver includes a PCB with a plurality of prefabricated surface bonding sites. A first chip includes a FOWLP package of multiple electronics devices embedded in a dielectric molding layer overlying a dielectric redistribution layer is disposed on the PCB by respectively bonding a plurality of conductor balls between the dielectric redistribution layer and the plurality of prefabricated surface bonding sites while exposing soldering material filled in multiple through-mold vias (TMVs) in the dielectric molding layer. The optical transceiver further includes a second chip configured as a Sipho die comprising photonics devices embedded in a SOI wafer substantially free from any electronics device process. The second chip is stacked over the first chip with multiple conductor bumps being bonded respectively to the soldering material in the multiple TMVs.
Glass-as-a-platform (GaaP)-based photonic assemblies comprising shaped glass plates
Glass-as-a-Platform (GaaP) assemblies are provided. Embodiments of the GaaP assembly comprise a first glass plate and a second glass plate, each disposed under one or more switch ASICs and one or more opto-electronic devices co-packaged on the same substrate. Each glass plate includes a plurality of waveguides. The co-packaged substrate is disposed on top of one or more of the first glass plate and second glass plate, the first glass plate configured to couple to one or more opto-electronic devices and the second glass plate configured to couple to one or more other opto-electronic devices. A faceplate interface end of each glass plate is configured to connect to one or more optical cable connectors. The glass plates are configured to route optical signals to and from one or more opto-electronic devices and one or more optical cable connectors through the one or more waveguides and openings in the co-packaged substrate.