A method for manufacturing a liquid crystal display, and the display formed thereby, the method including forming a first display panel including a thin film transistor and a pixel electrode connected to the thin film transistor, the thin film transistor including an auxiliary electrode, a semiconductor layer disposed on the auxiliary electrode, and a gate electrode disposed on the semiconductor layer, forming a second display panel including a common electrode, forming a liquid crystal layer including a plurality of liquid crystal molecules on the first display panel or the second display panel, bonding the first display panel and the second display panel, applying different voltages to the pixel electrode and the common electrode, and irradiating ultraviolet rays in the liquid crystal layer, to initially align the liquid crystal molecules.

A display device includes a switching element having a pixel connection portion, a first insulating film having a first pixel contact hole formed therein so as to be in a place overlapping at least a part of the pixel connection portion, a common line, an intermediate electrode composed of the same conducting film as the common line, disposed to overlap the first pixel contact hole, and connected to the pixel connection portion, a common electrode not connected to the intermediate electrode but connected to the common line, a second insulating film having a second pixel contact hole formed therein so as to be in a place overlapping at least a part of the intermediate electrode, and a pixel electrode disposed so that at least a part of the pixel electrode overlaps the second pixel contact hole.

Embodiments of the present disclosure provide an array substrate and a manufacturing method for the same, and a display device. The array substrate includes a display region, and a package region arranged around the display region. The package region includes a plurality of separated signal line regions. In at least one of the signal line regions, at least two signal lines which are insulated from and overlapped with each other are arranged. In embodiments of the present disclosure, the coverage area of the signal lines on the package region may be effectively reduced as compared with the conventional structure in which the signal lines are arranged in one circuit layer. Therefore, the influence of the signal lines on the package region on the curing effect may be effectively reduced when the UV light is irradiated from the array substrate side for UV curing.

Provided are an array substrate and a manufacturing method therefor, and a display panel. The array substrate comprises: a base substrate; a data line and a passivation layer which are formed on the base substrate; a common electrode layer formed on the passivation layer; and a shielding electrode layer and a barrier layer which are formed on the base substrate, wherein the shielding electrode layer is arranged between the data line and the passivation layer, the barrier layer is arranged between the data line and the shielding electrode layer, the shielding electrode layer is grounded, and the barrier layer is made of a material with an insulation function.

An array substrate, a manufacturing method thereof, a display panel and a display device are disclosed to solve the technical problem that defects are caused to signal line wiring in a periphery area of the array substrate due to pressure applied to a sealant. The array substrate comprises a display area and a periphery area which is provided with a signal line wiring, wherein the periphery area is provided with a protection layer which at least partially covers the signal line wiring.

A display substrate includes a base substrate having a plurality of pixel areas and a pixel electrode in a pixel area of the plurality of pixel areas. The pixel electrode a first stem portion extending in a first direction, a second stem portion extending from the first stem portion in a second direction that intersects the first direction, a plurality of branch portions diagonally extending from at least one of the first stem portion and the second stem portion, and a bent portion extending from at least one of the plurality of branch portions.

An array substrate includes a first touch electrode array having m number of strip-shaped first touch electrodes extending in a first direction, a first integrated circuit having m number of touch signal terminals, each of which provides a drive signal to a corresponding first touch electrode; and a plurality of first touch signal lines, each of which is connected between one of the touch signal terminals and one of the first touch electrodes for transmitting the drive signal supplied from each touch signal terminal to the corresponding first touch electrode. The drive signal includes a touch drive signal and a display drive signal; during a display stage, each touch signal terminal supplies the display drive signal to the corresponding first touch electrodes; and, during a touch detection stage, each touch signal terminal supplies the touch drive signal to the corresponding first touch electrode.

A display panel and a method of restoring vertical dark lines of a display panel are provided. The display panel has at least one fan-out trace with a double-decked conducting wire structure. The fan-out trace includes a first conducting wire and a second conducting wire stack-up. An insulating layer is disposed between the first and second conducting wires to insulate and space the first and second conducting wires. For the method of restoring vertical dark lines of the display panel, forming at least four welds at an equal interval on the fan-out trace to electrically connect the first and second conducting wires.

A display device includes a first substrate, a first metal layer, a gate insulating layer, semiconductor channels, a second metal layer, a color filter layer, a shielding electrode, an insulating layer, pixel electrodes, a liquid crystal layer, a second substrate and a second common electrode. The first metal layer is located on the first substrate and includes scan lines, gates and first common electrodes. The gate insulating layer is located on the first metal layer. The semiconductor channels are located on the gate insulating layer. The second metal layer is located on the gate insulating layer, and includes sources, drains and data lines. The color filter layer is located on the second metal layer. The shielding electrode at least partially overlaps the second metal layer. The insulating layer is located on the color filter layer. The second common electrode is located on the second substrate.

A touch screen comprises a fixed electrode disposed on a side of an array substrate away from a color filter substrate, the array substrate comprises a base substrate, a plurality of sensing lines and a plurality of common electrodes arranged in a matrix, orthographic projections of the sensing lines and the fixed electrode on the base substrate overlap with orthographic projections of the common electrodes on the base substrate, an extending direction of the sensing line is parallel to a column direction of arrangement of the common electrodes; a portion of the common electrodes function as first driving electrodes during a pressure sensing touch control, the sensing lines corresponding to the rest common electrodes function as sensing electrodes during the pressure sensing touch control; the fixed electrode assists the first driving electrodes and the sensing electrodes to detect a touch pressure during the pressure sensing touch control.