Shared memory access in a distributed system, including: determining, in response to a memory access request, based on a time value, an entry in an access permissions table by: determining, based on a modulo of the time value and a number of entries in the access permissions table, a table index; determining, based on the table index, the entry; and determining, based on the entry, whether to allow the memory access request.

In one embodiment, a computing device includes an input sensor providing an input data; a programmable logic device (PLD) implementing a convolutional neural network (CNN), wherein: each compute block of the PLD corresponds to one of a multiple of convolutional layers of the CNN, each compute block of the PLD is placed in proximity to at least two memory blocks, a first one of the memory blocks serves as a buffer for the corresponding layer of the CNN, and a second one of the memory blocks stores model-specific parameters for the corresponding layer of the CNN.

The invention relates to a shared storage space access method, device and system and a storage medium. The product comprises a control module. The control module comprises an instruction cache unit, an instruction processing unit and a storage queue unit. The instruction caching unit is used for storing a calculation instruction associated with the artificial neural network operation; the instruction processing unit is used for analyzing the calculation instruction to obtain a plurality of operation instructions; the storage queue unit is used for storing an instruction queue, and the instruction queue comprises a plurality of operation instructions or calculation instructions to be executed according to the front-back sequence of the queue. Through the method or the product, the access efficiency of the storage space can be improved.

In one embodiment, a computing device includes an input sensor providing an input data; a programmable logic device (PLD) implementing a convolutional neural network (CNN), wherein: each compute block of the PLD corresponds to one of a multiple of convolutional layers of the CNN, each compute block of the PLD is placed in proximity to at least two memory blocks, a first one of the memory blocks serves as a buffer for the corresponding layer of the CNN, and a second one of the memory blocks stores model-specific parameters for the corresponding layer of the CNN.

An apparatus for executing a software program, comprising at least one hardware processor configured for: identifying in a plurality of computer instructions at least one remote memory access instruction and a following instruction following the at least one remote memory access instruction; executing after the at least one remote memory access instruction a sequence of other instructions, where the sequence of other instructions comprises a return instruction to execute the following instruction; and executing the following instruction; wherein executing the sequence of other instructions comprises executing an updated plurality of computer instructions produced by at least one of: inserting into the plurality of computer instructions the sequence of other instructions or at least one flow-control instruction to execute the sequence of other instructions; and replacing the at least one remote memory access instruction with at least one non-blocking memory access instruction.

A data processing device may include an internal volume that is sealed from space outside the internal volume and an optical system. The optical system may include a first portion, disposed in the internal volume, adapted to receive network data units from devices disposed in the internal volume and a second portion of the optical system. The optical system may also include the second portion, disposed outside of the internal volume, adapted to obtain the network data units from the first portion via an optical connection using transmission at optical frequencies.

Embodiments of the present disclosure relate to a method, an electronic device, and a computer program product for managing a storage system. The method includes: if it is determined based on current values of a plurality of attribute parameters of a storage device in a storage system that the storage device will have a fault, determining whether the fault of the storage device will not occur again based on reference values of attribute parameters in a first set in the plurality of attribute parameters and current values of attribute parameters in a second set in the plurality of attribute parameters. The method further includes: if it is determined that the fault of the storage device will not occur again, determining a cause of the fault based on the attribute parameters in the first set. The embodiments of the present disclosure can analyze a cause of a fault of a storage device, thereby avoiding the misjudgment of a storage device having no internal fault as a storage device having an internal fault.

A combination default write-blocking system may include a host computer. The host computer may include at least one general storage device storing program instructions for a blocking driver assembly and a host processor configured as the blocking driver assembly while executing the program instructions for the blocking driver assembly. A connection interface device physically separate from the host processor, and the connection interface device is configured to be operatively coupled to the host processor and to a protected storage device physically separate from the general storage device, receive a communication from the blocking driver assembly, and establish communication between the protected storage device and the host processor after receiving the communication from the blocking driver assembly. The blocking driver assembly is further configured to communicate with the connection interface device and conditionally allow a host computer process to alter data stored on the protected storage device.

Reducing file write latency includes receiving incoming data, from a data source, for storage in a file and a target storage location for the incoming data, and determining whether the target storage location corresponds to a cache entry. Based on at least the target storage location not corresponding to a cache entry, the incoming data is written to a block pre-allocated for cache misses and the writing of the incoming data to the pre-allocated block is journaled. The writing of the incoming data is acknowledged to the data source. A process executing in parallel with the above commits the incoming data in the pre-allocated block with the file. Using this parallel process to commit the incoming data in the file removes high-latency operations (e.g., reading pointer blocks from the storage media) from a critical input/output path and results in more rapid write acknowledgement.

The technology describes synchronization of writer and reader applications in a streaming data storage system, such as to facilitate a mode switch in which event writers can change event contents being appended to stream segments and event readers can process the event contents according to the new mode. A signal event is generated by a signaler for stream segments to which data event writes are being written, which changes the data writers' writing mode. The data storage system rejects appends of events after the signal that do not correspond to the new writing mode. The data storage system also writes a signal indicator to the segments being read at a location in each segment that is between the events written before the signal and the events written after the signal. Reader applications are synchronized based on encountering the signal indicator so as to appropriately switch to a new processing mode.