The invention comprises an apparatus, comprising an inductor, the inductor comprising: an inductor core; a first winding section comprising a first cast shape and a second winding section comprising the first cast shape, the first winding section mechanically joined to the second winding section to form a winding, the winding forming a wound shape about the inductor core. Optionally and preferably, a third winding section, comprising a second cast shape, mechanically joins the first winding section to the second winding section and a mechanical connector and/or an aluminum weld join the first winding section to the third winding section.

A dielectric film includes a substrate being a film including a resin material, and a plurality of microscopic members on a first surface of the substrate. Each of the plurality of microscopic members includes a first portion spaced from the first surface, and a second portion extending from the first surface and supporting the first portion.

A dielectric film includes a substrate being a film including a resin material, and a plurality of microscopic members on a first surface of the substrate. Each of the plurality of microscopic members includes a first portion spaced from the first surface, and a second portion extending from the first surface and supporting the first portion.

A second busbar is provided that has a second electrode terminal and a second connection terminal. A first busbar is provided that has a first electrode terminal, a lateral side coupler, an overhang, and a first connection terminal. The first electrode terminal and/or the second electrode terminal has a protruding piece for connection (connecting protrusion). This protruding piece is elastically depressible in response to contact with an electrode surface of a capacitor element unit inserted from an opposite side of the lateral side coupler across a space between the first and second electrode terminals.

A semiconductor package structure includes a substrate, a first redistribution layer, a semiconductor die, a silicon capacitor, and a first bump structure. The first redistribution layer is disposed over the substrate. The semiconductor die is disposed over the first redistribution layer. The silicon capacitor is disposed below the first redistribution layer and is electrically coupled to the semiconductor die, wherein the silicon capacitor includes a semiconductor substrate and a plurality of capacitor cells embedded in the semiconductor substrate. The first bump structure is disposed between the silicon capacitor and the substrate.

A hybrid power supply circuit, a method using a hybrid power supply circuit and method for producing a hybrid power supply circuit are disclosed. In an embodiment a hybrid power-supply circuit includes a first energy-storage device and a second energy-storage device, wherein the first and second energy-storage devices are combined in a module and electrically interconnected, and wherein the first energy-storage device is a solid-state accumulator.

According to one embodiment, a capacitor includes a conductive substrate, a conductive layer, a dielectric layer, and first and second external electrodes. The conductive substrate has a first main surface provided with recess(s), a second main surface, and an end face extending between edges of the first and second main surfaces. The conductive layer covers the first main surface and side walls and bottom surfaces of the recess(s). The dielectric layer is interposed between the conductive substrate and the conductive layer. The first external electrode includes a first electrode portion facing the end face and is electrically connected to the conductive layer. The second external electrode includes a second electrode portion facing the end face and is electrically connected to the conductive substrate.

According to one embodiment, a capacitor includes a conductive substrate, a conductive layer, a dielectric layer, and first and second external electrodes. The conductive substrate has a first main surface provided with recess(s), a second main surface, and an end face extending between edges of the first and second main surfaces. The conductive layer covers the first main surface and side walls and bottom surfaces of the recess(s). The dielectric layer is interposed between the conductive substrate and the conductive layer. The first external electrode includes a first electrode portion facing the end face and is electrically connected to the conductive layer. The second external electrode includes a second electrode portion facing the end face and is electrically connected to the conductive substrate.

An energy storage element and method of fabrication thereof are disclosed. An energy storage element includes a set of electrodes where one or more electrodes have extended conductive paths through nano-channel electric interconnections with ceramic particles in one or more dielectric layers. The electrode's electric field is extended into the dielectric material providing increased capacitance. The set of electrodes can include a pair of electrode layers respectively attached directly to opposing sides of one dielectric layer. The set of electrodes, which can also be referred to as multi-layer electrodes, can include a plurality of electrode layers interleaved between, and directly attached to, a plurality of stacked dielectric layers.

An energy storage element and method of fabrication thereof are disclosed. An energy storage element includes a set of electrodes where one or more electrodes have extended conductive paths through nano-channel electric interconnections with ceramic particles in one or more dielectric layers. The electrode's electric field is extended into the dielectric material providing increased capacitance. The set of electrodes can include a pair of electrode layers respectively attached directly to opposing sides of one dielectric layer. The set of electrodes, which can also be referred to as multi-layer electrodes, can include a plurality of electrode layers interleaved between, and directly attached to, a plurality of stacked dielectric layers.