Patent classifications
H01L23/02
Power module and substrate structure applied to power modules
An embodiment of the present disclosure provides a substrate structure applied to a power module. In the substrate structure applied to a power module, the substrate includes an upper substrate and a lower substrate, a plurality of semiconductor devices disposed on the lower substrate, a source signal electrode transmitting a source signal to the semiconductor devices, and a gate signal electrode transmitting a gate signal to the semiconductor devices, one of the source signal electrode or the gate signal electrode is connected to the upper substrate through a conductive column, and a signal transmitted by one of the source signal electrode or the gate signal electrode is transmitted to the semiconductor devices through the upper substrate.
MACHINED INTERPOSER TO ENABLE LARGE SCALE HIGH FREQUENCY CONNECTIVITY
An apparatus comprising an interposer mounted to a conductive holder and a plurality of microwave cavities, wherein each microwave cavity of the plurality of microwave cavities is comprised of a fin section having two sidewalls, wherein each sidewall is comprised of a vane that extends up from the conductive holder through the interposer.
Test method of a semiconductor device and manufacturing method of a semiconductor device
A test method for a semiconductor device having a package with airtight space, which is formed between a substrate wafer on which an element is formed and a cap wafer which is provided being opposite to the substrate wafer, comprises an applying water process in which the semiconductor device is exposed to high moisture atmosphere and cooled and a leak discrimination process in which power is supplied to the element which is formed on the substrate wafer and leak of the package is discriminated by detecting a sound wave which is generated by the semiconductor device.
Test method of a semiconductor device and manufacturing method of a semiconductor device
A test method for a semiconductor device having a package with airtight space, which is formed between a substrate wafer on which an element is formed and a cap wafer which is provided being opposite to the substrate wafer, comprises an applying water process in which the semiconductor device is exposed to high moisture atmosphere and cooled and a leak discrimination process in which power is supplied to the element which is formed on the substrate wafer and leak of the package is discriminated by detecting a sound wave which is generated by the semiconductor device.
Semiconductor package
Disclosed is a semiconductor package comprising a first semiconductor chip, a second semiconductor chip on a first surface of the first semiconductor chip, and a plurality of conductive pillars on the first surface of the first semiconductor chip and adjacent to at least one side of the second semiconductor chip. The first semiconductor chip includes a first circuit layer adjacent to the first surface of the first semiconductor chip. The second semiconductor chip and the plurality of conductive pillars are connected to the first surface of the first semiconductor chip.
Underfill injection for electronic devices
A device for applying underfill material into a space between a substrate and a semiconductor chip is provided. The device includes a frame housing configured to cover at least an outer edge area of the semiconductor chip that is bonded to the substrate. The device also includes a sealant attached to the frame housing and configured to contact the outer edge area of the semiconductor chip. The device also includes an outlet made on the frame housing for evacuating the space; and an inlet made on the frame housing for injecting the underfill material to the space.
Underfill injection for electronic devices
A device for applying underfill material into a space between a substrate and a semiconductor chip is provided. The device includes a frame housing configured to cover at least an outer edge area of the semiconductor chip that is bonded to the substrate. The device also includes a sealant attached to the frame housing and configured to contact the outer edge area of the semiconductor chip. The device also includes an outlet made on the frame housing for evacuating the space; and an inlet made on the frame housing for injecting the underfill material to the space.
SEMICONDUCTOR LASER DEVICE
Provided is a semiconductor laser device enabling efficient emission of a laser beam without damaging a light emitting surface of a light emitting element. Semiconductor laser device includes light emitting element, optical element, first heat radiation part, and second heat radiation part. Laser beam emitted from light emitting element enters optical element. First heat radiation part is connected to light emitting element. Second heat radiation part is connected to light emitting element. First heat radiation part includes first recess. Second heat radiation part includes second recess. One end of optical element is fitted into first recess, and the other end of optical element is fitted into second recess.
Electronic element mounting substrate and electronic device
An electronic element mounting substrate includes a first substrate that has a first main surface, has a rectangular shape, and has a mounting portion for an electronic element on the first main surface, and a second substrate that is located on a second main surface opposite to the first main surface, is made of a carbon material, has a rectangular shape, has a third main surface facing the second main surface and a fourth main surface opposite to the third main surface, in which the third main surface or the fourth main surface has heat conduction in a longitudinal direction greater than heat conduction in a direction perpendicular to the longitudinal direction, and that has a recessed portion on the fourth main surface.
Underfill between a first package and a second package
A method includes forming a release film over a carrier, attaching a device over the release film through a die-attach film, encapsulating the device in an encapsulating material, performing a planarization on the encapsulating material to expose the device, detaching the device and the encapsulating material from the carrier, etching the die-attach film to expose a back surface of the device, and applying a thermal conductive material on the back surface of the device.