Patent classifications
H01L23/57
METHOD FOR THE NON-COPYABLE MANUFACTURE OF INTEGRATED CIRCUITS
The method for creating integrated circuits (IC) protects the design of a manufactured IC from being copied or counterfeited. This method protects the design of an IC chip from deliberate copying and counterfeiting by reverse engineering to gain access to the critical points in the IC chip and to siphon its functions and design. The method makes the copying, counterfeiting, and controlling by addition of Trojan circuits during manufacturing almost impossible task. It also allows chip designers to outsource the final bonding of the tiers without any fears that their design may get compromised.
PRE-CONDITIONED SELF-DESTRUCTING SUBSTRATE
A self-destructing device includes a frangible substrate having at least one pre-weakened area. A heater is thermally coupled to the frangible substrate proximate to or at the pre-weakened area. When activated, the heater generates heat sufficient to initiate self-destruction of the frangible substrate by fractures that propagate from the pre-weakened area and cause the frangible substrate to break into many pieces.
Protection of an integrated circuit
A circuit for protecting an integrated circuit against fault injection attacks includes an element including a dielectric which is destroyed, resulting in the occurrence of a short-circuit. The element is connected between two terminals that receive a power supply voltage of the integrated circuit.
Integrated circuit package that measures amount of internal precious material
Integrated circuit package (ICP) with: (i) stored information pertaining to an amount and/or value of precious material present in the ICP; and (ii) sensor for detecting an amount of precious material present in the ICP. In some embodiments the ICP is embedded in a smart card for use with a smart card reader system that can communicate data to and/or from the ICP.
Method for the non-copyable manufacture of integrated circuits
The method for creating integrated circuits (IC) protects the design of a manufactured IC from being copied or counterfeited. This method protects the design of an IC chip from deliberate copying and counterfeiting by reverse engineering to gain access to the critical points in the IC chip and to siphon its functions and design. The method makes the copying, counterfeiting, and controlling by addition of Trojan circuits during manufacturing almost impossible task. It also allows chip designers to outsource the final bonding of the tiers without any fears that their design may get compromised.
Electrically-activated pressure vessels for fracturing frangible structures
An apparatus includes a pressure device bonded to the surface of a structure at a bonding location. The vessel comprises an interior space within the vessel and a bonding surface. A bonding agent bonds the bonding surface of the vessel to a surface of the structure. A gas-emitting material is disposed within the interior space of the vessel and an initiator is arranged to activate the gas-emitting material. Upon activation of the gas-emitting material by the initiator, the pressure device produces a localized force that breaks the structure.
Method and semiconductor device for protecting a semiconductor integrated circuit from reverse engineering
A protection method is provided to make it difficult to reverse engineer operational information. The present invention provides a protection method for preventing reverse engineering, including: generating an expected value during normal operation; monitoring voltage waveforms at monitoring points of the semiconductor integrated circuit; comparing a measured value generated in the monitored voltage waveforms with the expected value; determining whether reverse engineering is taking place or not based on comparison results; and when reverse engineering is taking place, controlling the semiconductor integrated circuit to run in a protection mode, which different from its normal operation.
SYSTEM AND METHODS FOR SECURE FIRMWARE VALIDATION
An electronic device, such as a dynamic transaction card having a chip, an applet, and a cryptographic coprocessor performs secure firmware and/or software updates, and performs firmware and/or software validation for firmware and/or software that is stored on the electronic device. Validation may compare a calculated checksum with a checksum stored in the device. If a checksum calculated for a firmware and/or a software application matches a stored checksum, the transaction card may operate normally. If a checksum calculated for a firmware and/or a software application does not match the stored checksum, the transaction card may freeze all capabilities, erase the memory of the transaction card, display data indicative of fraud, and/or the like.
FDSOI with on-chip physically unclonable function
An integrated circuit includes an array of devices with a logic pattern to implement a physically unclonable function (PUF) for chip authentication. The logic pattern is determined in accordance with processing variations during the manufacturing. The array of devices includes one or more components having a first state and one or more components having a second state. A combination of the first and second states provides the logic pattern.
Self-limiting electrical triggering for initiating fracture of frangible glass
A transient electronic device includes electronic elements (e.g., an SOI- or chip-based IC) and a trigger mechanism disposed on a frangible glass substrate. The trigger mechanism includes a switch that initiates a large trigger current through a self-limiting resistive element in response to a received trigger signal. The self-limiting resistive element includes a resistor portion that generates heat in response to the trigger current, thereby rapidly increasing the temperature of a localized (small) region of the frangible glass substrate, and a current limiting portion (e.g., a fuse) that self-limits (terminates) the trigger current after a predetermined amount of time, causing the localized region to rapidly cool down. The frangible glass substrate is engineered such that a stress profile produced by the rapid heating/cooling of the localized region generates an initial fracture force that subsequently propagates throughout the glass substrate, whereby sufficient potential energy is released to powderize the electronic elements.