A wiring substrate includes: an insulating substrate including a base portion comprising a through hole having a first opening and a second opening, and a frame portion located on the base portion; and a heat dissipator disposed on a side of the base portion that is opposite to the frame portion so as to block the second opening, wherein an inner surface of the through hole faces a side surface of the heat dissipator with a clearance being provided between the inner surface of the through hole and the side surface of the heat dissipator.

Disclosed herein is a device including at least one photoconductor configured for exhibiting an electrical resistance R.sub.photo dependent on an illumination of a light-sensitive region of the photoconductor; at least one photoconductor readout circuit, where the photoconductor readout circuit is configured for determining a differential voltage related to changes of the electrical resistance R.sub.photo of the photoconductor, where the photoconductor readout circuit includes at least one bias voltage source configured for applying at least one periodically modulated bias voltage to the photoconductor such that the electric output changes its polarity at least once; and at least one electrical circuit configured to balance the differential voltage at a given illumination level.

A unit cell for use in an optical active pixel sensor (APS) includes a photodiode having a first terminal connected to a photodiode biasing PDB line, and a second terminal opposite from the first terminal; a reset switch transistor having a first terminal connected to the second terminal of the photodiode, and a second terminal connected to a reference voltage line, and a gate of the reset switch transistor is connected to a reset signal RST supply line; and an amplification transistor having a first terminal connected to an output readout line, and a second terminal connected to a driving voltage supply line, and a gate of the amplification transistor is connected to a node constituting the connection of the second terminal of the photodiode and the first terminal of the reset switch transistor. An optical APS device includes a sensor matrix formed of a plurality of unit cells according to any of the embodiments arranged in an array of rows and columns.

A wiring base includes a base having a first surface, at least one metal layer positioned on the first surface, at least one lead terminal positioned on the metal layer, and a joining member that is positioned on the metal layer and joins the lead terminal to the metal layer. The lead terminal has a first portion to be in contact with the joining member and also has a second portion being continuous with the first portion. In a cross section of the lead terminal orthogonal to a longitudinal direction of the lead terminal, the first portion has two concave surfaces that are formed near the metal layer so as to be disposed opposite to each other across a center in a transverse direction of the lead terminal.

An FPA includes a substrate; a plurality of spaced-apart implant regions deposited in the substrate; a plurality of supplemental metal contacts, one supplemental metal contact of the plurality of supplemental metal contacts electrically connected to one implant region of the plurality of implant regions; a plurality of metal conductors electrically connecting the plurality of supplemental metal contacts; and a primary metal contact, electrically connected to the plurality of supplemental metal contacts by at least one of the metal conductors of the plurality of metal conductors. The pixel can include an Indium bump electrically connected to the primary metal contact.

An avalanche photo-diode (APD) circuit includes a first APD and a bias circuit. The first APD is configured to detect light. The bias circuit is configured to control a gain of the first APD. The bias circuit includes a second APD, a reference voltage source, a bias voltage generation circuit, and a metal layer configured to shield the second APD from the light. The reference voltage source is configured to bias the second APD. The bias voltage generation circuit is configured to generate a bias voltage for biasing the first APD based on dark current output by the second APD.

The present disclosure provides an electronic package. The electronic package includes a substrate, a first electronic component, an encapsulant, and a shielding layer. The substrate has a first upper surface, a second upper surface, and a first lateral surface extending between the first upper surface and the second upper surface. The first electronic component is disposed on the substrate. The encapsulant coves the first electronic component and the first lateral surface of the substrate. The shielding layer covers the encapsulant. The shielding layer is spaced apart from the first lateral surface of the substrate.

A high efficiency configuration for a string of solar cells comprises series-connected solar cells arranged in an overlapping shingle pattern. Front and back surface metallization patterns may provide further increases in efficiency.

A method of fabricating a solar cell assembly comprising a plurality of solar cells mounted on a flexible support, the support comprising a conductive layer on the top surface thereof divided into two electrically isolated portions—a first conductive portion and a second conductive portion. Each solar cell comprises a front surface, a rear surface, and a first contact on the rear surface and a second contact on the front surface. Each one of the plurality of solar cells is placed on the first conductive portion with the first contact electrically connected to the first conductive portion so that the solar cells are connected through the first conductive portion. A second contact of each solar cell is then connected to the second conductive portion by an interconnect. The two conductive portions serve as bus bars representing contacts of two different polarities of the solar cell assembly.

A method for manufacturing an optical-semiconductor device, including forming a plurality of first and second electrically conductive members that are disposed separately from each other on a support substrate; providing a base member formed from a light blocking resin between the first and second electrically conductive members; mounting an optical-semiconductor element on the first and/or second electrically conductive member; covering the optical-semiconductor element by a sealing member formed from a translucent resin; and obtaining individual optical-semiconductor devices after removing the support substrate.