The present disclosure provides a light emitting device including a substrate, a conductive layer, first and second reflective layers, a light emitting element, and an encapsulation layer. The conductive layer is disposed on the substrate. The first reflective layer covers the conductive layer and has an opening exposing a portion of the conductive layer. The light emitting element is disposed in the opening and electrically connects to the conductive layer. The second reflective layer is disposed on the first reflective layer and surrounds the light emitting element, and the second reflective layer has an outer diameter. The encapsulation layer covers the light emitting element. There is a height between a highest point of the encapsulation layer and an upper surface of the first reflective layer, and the height is 0.1 to 0.5 times the outer diameter. The present disclosure also provides a backlight and a display panel.

Discussed is a method of manufacturing a display device, the method including: introducing semiconductor light emitting devices including a magnetic material into a fluid chamber; transferring a substrate to the fluid chamber, the substrate including assembly electrodes, an insulating layer covering the assembly electrodes, and open holes in the insulating layer and exposing portions of both ends of the assembly electrodes; applying a magnetic force to the semiconductor light emitting devices introduced into the fluid chamber to move the semiconductor light emitting devices in one direction; and forming an electric field so that the moving semiconductor light emitting devices are disposed at preset positions of the substrate, wherein a probe pin is in contact with the assembly electrodes exposed through the open holes to individually apply a voltage to the assembly electrodes to form the electric field.

The Invention relates to a housing for an optoelectronic semiconductor component, comprising: a housing main body, which has a chip mounting side, at least two electrical conducting structures in and/or on the housing main body, and a plurality of drainage structures on the chip mounting side. The electrical conducting structures form, on the chip mounting side, electrical contact surfaces for at least one optoelectronic semiconductor chip and the drainage structure are designed as means for feeding a liquid potting material to the electrical contact surfaces.

According to the present specification, provided is a micro LED display device. The micro LED display device includes a substrate, a supply voltage line on the substrate, and a micro LED area disposed on the supply voltage line. At least one portion of the supply voltage line is disposed at the vertical lower part of the micro LED area.

A display device includes transistors disposed on a substrate, a first protective layer covering the transistors, conductive patterns disposed on the first protective layer, a second protective layer disposed on the conductive patterns, first and second electrodes disposed on the second protective layer, at least one light emitting disposed between the first and second electrodes, and a first contact electrode disposed on the first electrode and contacting an end of at least one light emitting element, and a second contact electrode disposed on the second electrode and contacting another end of the at least one light emitting element. The conductive patterns include first and second conductive patterns respectively overlapping the first and second electrodes. The first electrode is connected to the first conductive pattern. The second protective layer includes an opening hole exposing a portion of the second conductive pattern.

The application discloses a bonding method, a display backplane and a system for manufacturing the display backplane. The method includes: providing a substrate, and forming a plurality of first metal bumps on the substrate; providing a transfer device to transfer the plurality of the first metal bumps to a TFT substrate to form a plurality of pairs of metal pads on the TFT substrate, wherein each pair of the metal pads include two of the first metal bumps; and providing a plurality of LED flip chips, and transferring the plurality of LED flip chips to the TFT substrate by using the transfer device to bond electrodes of each of the LED flip chips to one pair of the metal pads respectively.

The present disclosure relates to an epitaxial wafer and a preparing method thereof, and a light-emitting device. The epitaxial wafer includes a substrate and an epitaxial stack, the epitaxial stack is disposed on the substrate, and the epitaxial stack includes a first epitaxial structure, a conductive adhesive layer, and a second epitaxial structure which are sequentially stacked in a direction parallel to an extension direction of the substrate. The first epitaxial structure is adhesively fixed to the second epitaxial structure through the conductive adhesive layer. The first epitaxial structure includes a first N-type semiconductor layer, a first active layer, and a first P-type semiconductor layer. The second epitaxial structure includes a second N-type semiconductor layer, a second active layer, and a second P-type semiconductor layer.

A display device includes light-emitting elements arranged on a circuit board, and extending in a thickness direction of the circuit board, wherein the light-emitting elements include a first light-emitting element configured to emit a first light, and a second light-emitting element configured to emit a second light, wherein the first light-emitting element and the second light-emitting element are on different layers, and wherein a width of the first light-emitting element is greater than a width of the second light-emitting element.

An epitaxial structure includes a quantum well structure, a first type semiconductor layer, and a second type semiconductor layer. The quantum well structure has an upper surface and a lower surface opposite to each other and includes at least one quantum well layer and at least one quantum barrier layer stacked alternately. The quantum well layer includes at least one patterned layer, and the patterned layer includes multiple geometric patterns. The first type semiconductor layer is disposed on the lower surface of the quantum well structure. The second type semiconductor layer is disposed on the upper surface of the quantum well structure.

An overall displacement tolerance applicable to each pixel tile in a plurality of pixel tiles to be used as parts of an image rendering surface is determined. Each pixel tile in the plurality of pixel tiles comprises a plurality of sub-pixels. Random displacements are generated in each pixel tile in the plurality of pixel tiles based on the overall displacement tolerance. The plurality of image rendering tiles with the random displacements are combined into the image rendering surface.