Described herein are methods for using remote plasma chemical vapor deposition (RP-CVD) and sputtering deposition to grow layers for light emitting devices. A method includes growing a light emitting device structure on a growth substrate, and growing a tunnel junction on the light emitting device structure using at least one of RP-CVD and sputtering deposition. The tunnel junction includes a p++ layer in direct contact with a p-type region, where the p++ layer is grown by using at least one of RP-CVD and sputtering deposition. Another method for growing a device includes growing a p-type region over a growth substrate using at least one of RP-CVD and sputtering deposition, and growing further layers over the p-type region. Another method for growing a device includes growing a light emitting region and an n-type region using at least one of RP-CVD and sputtering deposition over a p-type region.

The present invention is a light emitting diode (LED) device including a substrate, a buffer layer, a first conductivity type semiconductor layer, a light emitting layer, an interlayer, an electron blocking layer, and a second conductivity type semiconductor layer. The thickness of the interlayer is substantially thinner than the thickness of the electron blocking layer. In an embodiment of the present invention, the interlayer is doped with a p-type dopant, and the electron blocking layer is doped with a p-type dopant, and the concentration of the p-type dopant of the interlayer is lower than the concentration of the p-type dopant of the electron blocking layer.

A self-supporting substrate includes a first nitride layer grown by hydride vapor deposition method or ammonothermal method and comprising a nitride of one or more element selected from the group consisting of gallium, aluminum and indium; and a second nitride layer grown by a sodium flux method on the first nitride layer and comprising a nitride of one or more element selected from the group consisting of gallium, aluminum and indium. The first nitride layer includes a plurality of single crystal grains arranged therein and being extended between a pair of main faces of the first nitride layer. The second nitride layer includes a plurality of single crystal grains arranged therein and being extended between a pair of main faces of the second nitride layer. The first nitride layer has a thickness larger than a thickness of the second nitride layer.

A semiconductor device includes a semiconductor layered structure, an electrode unit, and an anti-adsorption layer. The electrode unit is disposed on an electrode connecting region of the semiconductor layered structure, and is a multi-layered structure. The anti-adsorption layer is disposed on a top surface of the electrode unit opposite to the semiconductor layered structure. Also disclosed herein is a light-emitting system including the semiconductor device.

A semiconductor device includes a semiconductor layered structure, an electrode unit, and an anti-adsorption layer. The electrode unit is disposed on an electrode connecting region of the semiconductor layered structure, and is a multi-layered structure. The anti-adsorption layer is disposed on a top surface of the electrode unit opposite to the semiconductor layered structure. Also disclosed herein is a light-emitting system including the semiconductor device.

A light-emitting element includes: a first light-emitting portion includes, in order upward from a lower side, a first n-side layer, a first active layer, and a first p-side layer disposed, each made of a nitride semiconductor; an intermediate layer disposed over the first light-emitting portion and made of a nitride semiconductor including an n-type impurity; and a second light-emitting portion disposed over the intermediate layer and comprising, in order upward from a lower side, a second n-side layer, a second active layer, and a second p-side layer, each made of a nitride semiconductor. An n-type impurity concentration in the intermediate layer is greater than an n-type impurity concentration in the first n-side layer. The first p-side layer includes: a first layer including aluminum and gallium, and a second layer disposed above the first layer, including aluminum and gallium.

A new and useful p-type oxide semiconductor with a wide band gap and an enhanced electrical conductivity and the method of manufacturing the p-type oxide semiconductor are provided. A method of manufacturing a p-type oxide semiconductor including: generating atomized droplets by atomizing a raw material solution containing at least a d-block metal in the periodic table and a metal of Group 13 of the periodic table; carrying the atomized droplets onto a surface of a base by using a carrier gas; causing a thermal reaction of the atomized droplets adjacent to the surface of the base under an atmosphere of oxygen to form the p-type oxide semiconductor on the base.

A new and useful p-type oxide semiconductor with a wide band gap and an enhanced electrical conductivity and the method of manufacturing the p-type oxide semiconductor are provided. A method of manufacturing a p-type oxide semiconductor including: generating atomized droplets by atomizing a raw material solution containing at least a d-block metal in the periodic table and a metal of Group 13 of the periodic table; carrying the atomized droplets onto a surface of a base by using a carrier gas; causing a thermal reaction of the atomized droplets adjacent to the surface of the base under an atmosphere of oxygen to form the p-type oxide semiconductor on the base.

A nitride semiconductor light-emitting element at least includes an underlayer, an n-type contact layer, a light-emitting layer, and a p-type nitride semiconductor layer successively disposed on a substrate. The film thickness ratio R, the ratio of the thickness of the n-type contact layer to the thickness of the underlayer, is 0.8 or less. The number density of V-pits in the surface of the light-emitting layer located on the p-type nitride semiconductor layer side is 1.5×10.sup.8/cm.sup.2 or less. This can provide a nitride semiconductor light-emitting element that can realize improvements in the light emission efficiency at the actual operating temperature and the temperature characteristic and an improvement in the ESD resistance without causing conflict.

An engineered substrate structure includes a ceramic substrate having a front surface characterized by a plurality of peaks. The ceramic substrate includes a polycrystalline material. The engineered substrate structure also includes a planarization layer comprising a planarization layer material and coupled to the front surface of the ceramic substrate. The planarization layer defines fill regions filled with the planarization layer material between adjacent peaks of the plurality of peaks on the front surface of the ceramic substrate. The engineered substrate structure further includes a barrier shell encapsulating the ceramic substrate and the planarization layer, wherein the barrier shell has a front side and a back side, a bonding layer coupled to the front side of the barrier shell, a single crystal layer coupled to the bonding layer, and a conductive layer coupled to the back side of the barrier shell.