An optoelectronic semiconductor chip has a first semiconductor layer sequence which comprises a multiplicity of microdiodes, and a second semiconductor layer sequence which comprises an active region. The first semiconductor layer sequence and the second semiconductor layer sequence are based on a nitride compound semiconductor material, the first semiconductor layer sequence is before the first semiconductor layer sequence in the direction of growth, and the microdiodes form an ESD protection for the active region.

A manufacturing method for a MEMS element, by which both a microphone including a microphone capacitor and a pressure sensor including a measuring capacitor are implemented in the MEMS structure. The components of the microphone and pressure sensor are formed in parallel but independently in the layers of the MEMS structure. The pressure sensor diaphragm is structured from a first layer, which functions as a base layer for the microphone diaphragm. The fixed counter-electrode of the measuring capacitor is structured from an electrically conductive second layer which functions as a diaphragm layer of the microphone. The fixed pressure sensor counter-element is structured from third and fourth layers. The third layer functions in the area of the microphone structure as a sacrificial layer, the thickness of which in the area of the microphone structure determines the electrode distance of the microphone capacitor. The microphone counter-element is structured from the fourth layer.

A light-emitting element includes: a semiconductor light-emitting stack including a first semiconductor layer with a first conductivity, an active layer, and a second semiconductor layer with a second conductivity; a first conductive layer disposed on the semiconductor light-emitting stack and electrically connecting the second semiconductor layer; a first insulating layer on the first conductive layer; a second conductive layer disposed on the first insulating layer and electrically connecting the first semiconductor layer; a second insulating layer on the second conductive layer; a first pad and a second pad on the second conductive layer; and a cushion part disposed between the first pad and the second pad.

A light-emitting device, includes a substrate structure, including a base portion having a surface and a plurality of protrusions regularly formed on the base portion; a buffer layer covering the plurality of protrusions and the surface; and III-V compound semiconductor layers formed on the buffer layer; wherein one of the plurality of protrusions includes a first portion and a second portion formed on the first portion and the first portion is integrated with the base portion; and wherein the base portion includes a first material and the first portion includes the first material.

The purpose of the present invention is to provide a technique of manufacturing a nitride semiconductor layer with which, when producing a semiconductor device by forming a nitride semiconductor layer on off-angle inclined substrate, it is possible to stably supply high-quality semiconductor devices by preventing occurrence of a macro step using a material that is not likely to occur lattice strains or crystal defects by mixing with GaN and does not require continuous addition; and provided is a nitride semiconductor device which comprises a nitride semiconductor layer formed on a substrate, wherein the substrate is inclined at an off angle, a rare earth element-added nitride layer to which a rare earth element is added is formed on the substrate as a primed layer, and a nitride semiconductor layer is formed on the rare earth element-added nitride layer.

A method of forming an optoelectronic semiconductor device involves providing an amorphous substrate. A transparent and conductive oxide layer is deposited on the amorphous substrate. The transparent and conductive oxide layer is annealed to form an annealed transparent and conductive oxide layer having a cubic-oriented and/or rhombohedral-oriented surface. A nanorod array is formed on the cubic-oriented and/or rhombohedral-oriented surface of the annealed transparent and conductive oxide layer. The annealing of the transparent conductive oxide layer and the formation of the nanorod array are performed using molecular beam epitaxy (MBE). The nanorods of the nanorod array comprise a group-III material and are non-polar.

A micro-light emitting diode (micro-LED) includes a current aperture to confine the current in a localized region such that the carrier recombination mostly occurs in the localized region to emit photons, thereby reducing the surface recombination and improving the quantum efficiency. The current confinement and localization are achieved using a localized breakthrough of a barrier layer by a localized contact, lightly p-doped active layers to suppress lateral transport of the carriers to the surface region, selective ion implantation, etching, or oxidation of a semiconductor layer, or any combination thereof.

A multi-junction light-emitting diode (LED) includes a first epitaxial structure, a second epitaxial structure and a tunnel junction structure disposed therebetween. The tunnel junction structure includes a In.sub.zAl.sub.X1Ga.sub.1−X1As highly doped p-type semiconductor layer wherein z ranges from 0 to 0.05, a Al.sub.X2Ga.sub.1−X2As first composition graded layer wherein X2 is greater than 0 and less than X1, a Ga.sub.YIn.sub.1−YP highly doped n-type semiconductor layer and a Al.sub.X3Ga.sub.1−X3As second composition graded layer that are sequentially disposed on the first epitaxial structure in such order. A method for making the abovementioned multi-junction LED is also disclosed.

A micro-LED chip includes multiple micro-LEDs. At least one micro-LED includes: a first type conductive layer; a second type conductive layer stacked on the first type conductive layer; and a light emitting layer formed between the first type conductive layer and the second type conductive layer. The light emitting layer extends along a horizontal level from a top edge of the first type conductive layer and from a bottom edge of the second type conductive layer, such that an edge of the light emitting layer does not contact the top edge of the first type conductive layer and the bottom edge of the second type conductive layer, and the bottom edge of the second type conductive layer is aligned with the top edge of the first type conductive layer. The micro-LED chip further includes a metal layer formed on the light emitting layer between adjacent micro-LEDs.

A micro-light emitting diode (micro-LED) includes a current aperture to confine the current in a localized region such that the carrier recombination mostly occurs in the localized region to emit photons, thereby reducing the surface recombination and improving the quantum efficiency. The current confinement and localization are achieved using a localized breakthrough of a barrier layer by a localized contact, lightly p-doped active layers to suppress lateral transport of the carriers to the surface region, selective ion implantation, etching, or oxidation of a semiconductor layer, or any combination thereof.