Patent classifications
H01L2224/90
Interposer having a pattern of sites for mounting chiplets
The described embodiments include an interposer with signal routes located therein. The interposer includes a set of sites arranged in a pattern, each site including a set of connection points. Each connection point in each site is coupled to a corresponding one of the signal routes. Integrated circuit chiplets may be mounted on the sites and signal connectors for mounted integrated circuit chiplets may coupled to some or all of the connection points for corresponding sites, thereby coupling the chiplets to corresponding signal routes. The chiplets may then send and receive signals via the connection points and signal routes. In some embodiments, the set of connection points in each of the sites is the same, i.e., has a same physical layout. In other embodiments, the set of connection points for each site is arranged in one of two or more physical layouts.
SOLAR CELL MODULE AND CONDUCTOR
A solar cell module includes: an at least one solar cell disposed between a first cover and a second cover; a sealing material that fills a gap between the first cover and the second cover to join them together, and seals the solar cell; and a tab line as a conductor electrically connected to the solar cell and enclosed by the sealing material between the first cover and the second cover, the tab line having a plurality of bases, and an expansion and contraction portion that can expand and contract in a longitudinal direction and connects the plurality of bases, the plurality of bases each being provided with a through hole and a connection base electrically connected to the solar cell, at least one of the first cover and the second cover having a boss as a positioning unit that positions the tab line.
REMOTE HEAT SINK SIDE ATTACH METHODOLOGY
An apparatus includes a base, an integrated circuit (IC), a thermal interface material (TIM) disposed on the IC, and a heat sink. The heat sink has a vapor chamber (VC) and a condenser coupled with, and spaced from, the VC. The condenser also has a mounting arm extending outward to a side of the condenser. The apparatus further includes a mounting bracket that couples the condenser with the base. The mounting bracket defines one or more oblong holes to accommodate respective horizontally-oriented fasteners that secure the mounting arm to the mounting bracket in such a way that the condenser is oriented and positioned at a height that enables the VC to be arranged on the TIM in a neutral position. A method of assembling such an apparatus is also disclosed.
IC structure with angled interconnect elements
Aspects of the present disclosure include integrated circuit (IC) structures with angled interconnect elements. An IC structure according to the present disclosure can include: an IC chip interconnect surface including a radially inner region positioned within a radially outer region; and a plurality of conductive pillars extending outward from the radially inner region of the IC chip interconnect surface, relative to a radial centerline axis of the radially inner region of the IC chip interconnect surface, wherein the radially inner region of the IC chip interconnect surface is free of conductive pillars thereon.
Interposer having a Pattern of Sites for Mounting Chiplets
The described embodiments include an interposer with signal routes located therein. The interposer includes a set of sites arranged in a pattern, each site including a set of connection points. Each connection point in each site is coupled to a corresponding one of the signal routes. Integrated circuit chiplets may be mounted on the sites and signal connectors for mounted integrated circuit chiplets may coupled to some or all of the connection points for corresponding sites, thereby coupling the chiplets to corresponding signal routes. The chiplets may then send and receive signals via the connection points and signal routes. In some embodiments, the set of connection points in each of the sites is the same, i.e., has a same physical layout. In other embodiments, the set of connection points for each site is arranged in one of two or more physical layouts.
Interposer having a Pattern of Sites for Mounting Chiplets
The described embodiments include an interposer with signal routes located therein. The interposer includes a set of sites arranged in a pattern, each site including a set of connection points. Each connection point in each site is coupled to a corresponding one of the signal routes. Integrated circuit chiplets may be mounted on the sites and signal connectors for mounted integrated circuit chiplets may coupled to some or all of the connection points for corresponding sites, thereby coupling the chiplets to corresponding signal routes. The chiplets may then send and receive signals via the connection points and signal routes. In some embodiments, the set of connection points in each of the sites is the same, i.e., has a same physical layout. In other embodiments, the set of connection points for each site is arranged in one of two or more physical layouts.
COOLING AND POWER DELIVERY FOR A WAFER LEVEL COMPUTING BOARD
A computing device includes a wafer having multiple layers, the wafer including a top layer and sublayers disposed below it, the sublayers including one or more memory devices. The computing device also includes two or more shaped retainer elements shaped to mate with and at least partially surround at least the top of the wafer and in electrical contact with one or more chips disposed on a top of the top layer and a holding device that mates with the retainer elements to provide at least power to the retaining elements. So arranged, the wafer may be cooled.
COOLING AND POWER DELIVERY FOR A WAFER LEVEL COMPUTING BOARD
A computing device includes a wafer having multiple layers, the wafer including a top layer and sublayers disposed below it, the sublayers including one or more memory devices. The computing device also includes two or more shaped retainer elements shaped to mate with and at least partially surround at least the top of the wafer and in electrical contact with one or more chips disposed on a top of the top layer and a holding device that mates with the retainer elements to provide at least power to the retaining elements. So arranged, the wafer may be cooled.
HYBRID FELTS OF ELECTROSPUN NANOFIBERS
The present invention relates generally to compositions for use in biological and chemical separations, as well as other applications. More specifically, the present invention relates to hybrid felts fabricated from electrospun nanofibers with high permeance and high capacity. Such hybrid felts utilize derivatized cellulose, and at least one non-cellulose-based polymer that may be removed from the felt by subjecting it to moderately elevated temperatures and/or solvents capable of dissolving the non-cellulose-based polymer to leave behind a porous nanofiber felt having more uniform pore sizes and other enhanced properties when compared to single component nanofiber felts.
HYBRID FELTS OF ELECTROSPUN NANOFIBERS
The present invention relates generally to compositions for use in biological and chemical separations, as well as other applications. More specifically, the present invention relates to hybrid felts fabricated from electrospun nanofibers with high permeance and high capacity. Such hybrid felts utilize derivatized cellulose, and at least one non-cellulose-based polymer that may be removed from the felt by subjecting it to moderately elevated temperatures and/or solvents capable of dissolving the non-cellulose-based polymer to leave behind a porous nanofiber felt having more uniform pore sizes and other enhanced properties when compared to single component nanofiber felts.