The application discloses a tuner and a method for tuning a signal. The tuner comprises: a sampling module, the sampling module being configured to receive an input signal and a set of control signals, sample the input signal under the control of the set of control signals and generate a sample signal; wherein each of the set of control signals has a control period equal to (N*T.sub.VCO), and the control periods of the set of control signals synchronize with each other; a set of weighting modules, wherein each of the set of weighting modules is configured to receive the set of sample signals and weight the received sample signals with a group of weighting factors to generate a group of weighted signals; and one or more summing modules, each summing module being configured to receive one group of weighted signals generated by one of the set of weighting modules and sum the group of weighted signals to output an output signal, wherein the output signal is the input signal being shifted by a predefined frequency f.sub.VCO*m.sub.k/N.

An apparatus and a method. The apparatus includes a first low pass filter (LPF), a second LPF, a first analog-to-digital converter (ADC), a second ADC, a first discrete Fourier transform (DFT) unit, a second DFT unit, a second order intermodulation (IM2) tone amplitude measurement unit, and a calibration logic unit configured to simultaneously determine an in-phase mixer (I-mixer) digital-to-analog (DAC) code and a quadrature-phase mixer (Q-mixer) DAC code.

A frequency converter comprising a frequency transposition block for samples (11.sub.Q.sub._.sub.1, 11.sub.Q.sub._.sub.2), a filtering block (12.sub.Q.sub._.sub.1, 12.sub.Q.sub._.sub.2), the filtered samples y(n) verifying y(n)=c(0).Math.x(n)+c(1).Math.x(n−1)+c(2).Math.x(n−2)+ . . . +c(p−1).Math.x(n−p+1)+c(p).Math.x(n−p)+c(p−1).Math.x(n−p−1)+ . . . + . . . +c(1).Math.x(n−2.Math.p+1)+c(0).Math.x(n−2.Math.p), wherein x( ) are the transposed samples and c(0), . . . c(p) are the real coefficients of the filter; and being adapted for, during a cycle for determining the value of the filtered sample y(n): calculating the first terms c(0).Math.x(n), c(1).Math.x(n−1), c(2).Math.x(n−2), . . . , c(p).Math.x(n−p) by multiplying the respective coefficients and transposed samples, and storing in memory said first calculated terms; reading the second terms c(p−1).Math.x(n−p−1), . . . , c(1).Math.x(n−2.Math.p+1), c(0).Math.x(n−2.Math.p), calculated and stored in memory during previous cycles for determining the value of filtered samples y(n−m); and determining y(n) by summation of the first and second terms.

A mixing module (40) comprises a switching mixer (400), controlled by a switch signal and configured to receive an inputting signal and generate an outputting signal; a modulating unit (402), coupled to the switching mixer (400) and configured to generate the switch signal; wherein a switching frequency of the switch signal is higher than an and is a specific multiple of inputting frequency of the inputting signal. The mixing module (40) controls the switching mixer (400) by using the switch signal which is much higher than the inputting frequency of the inputting signal; oversampling is performed on the inputting signal, so that the spectrum energy of the outputting signal is more concentrated, which can avoid the additional noise due to the introduction of sidelobes or harmonics.

A multiplier circuit includes a partial product generation circuit, a truncation circuit, and a summation circuit. The partial product generation circuit is configured to generate a plurality of partial products for multiplying two values. The truncation circuit is coupled to the partial product generation circuit. The truncation circuit is configured to shorten at least some of the partial products by removing a least significant bit from the at least some of the partial products. The summation circuit coupled to the truncation circuit. The summation circuit is configured to sum the truncated partial products produced by the truncation circuit.

Various embodiments provide for systems and methods for signal conversion of one modulated signal to another modulated signal using demodulation and then re-modulation. According to some embodiments, a signal receiving system may comprise an I/Q demodulator that demodulates a first modulated signal to an in-phase (“I”) signal and a quadrature (“Q”) signal, an I/Q signal adjustor that adaptively adjusts the Q signal to increase the signal-to-noise ratio (SNR) of a transitory signal that is based on a second modulated signal, and an I/Q modulator that modulates the I signal and the adjusted Q signal to the second modulated signal. To increase the SNR, the Q signal may be adjusted based on a calculated error determined for the transitory signal during demodulation by a demodulator downstream from the I/Q modulator.

An adjustable mixer is disclosed that is capable of operating in different modes in order to satisfy the mixing requirement of multiple radio access technologies (RATs). The adjustable mixer includes a LO signal generating portion and a mixing portion. Depending on the mixing requirements of the RAT, the adjustable mixer can operate in any one of multiple modes, each mode having a specific configuration for the LO signal generating portion and the mixing portion. The LO signal generating portion generates a LO signal having a particular duty cycle, depending on the selected mode, for use by the mixing portion. The mixing portion has an adjustable circuit configuration that can be dynamically reconfigured based on the selected mode, and which allows the mixing portion to successfully mix received signals using the corresponding LO signals generated by the LO signal generating portion.

Described herein are systems and methods that allow for correcting a residual frequency offset in the GHz frequency range by using low-complexity analog circuit implementations of a broad-band frequency detector that comprises two analog polyphase filters in a dual configuration. Each filter comprises an RC network of cross-coupled capacitors that facilitate filters with opposite passbands and opposite stop-bands. In various embodiments, the outputs of the two filters are combined to obtain power metrics that when subtracted from each other, deliver a measure of the imbalance between the positive and negative halves of a frequency spectrum. Since the measure is substantially proportional to a frequency offset within a linear range spanning 5 GHz or more, the polyphase filters may be used in a broad-band frequency detector that, based on the measure, adjusts the frequency offset.

An example method of operating a radio system includes receiving, over a receiver-path, an RF input signal from an antenna, and converting the RF input signal to fall within a pre-defined frequency range using a local oscillation signal. The method further includes processing the converted input signal with a standard filter. In some examples, the method further includes generating the local oscillation signal in a transmitter path of the radio system.

A biasing scheme for a frequency multiplication circuit, and transceiver using LO signals provided by the frequency multiplication circuit are described. A frequency doubler is cascaded with a mixer to provide a mm-wave oscillator signal. The combination provides a frequency triple that of the LO frequency supplied to the frequency doubler from a PLL. A small-sized replica of the frequency doubler is used to determine biasing of transconductance devices of the frequency doubler. A voltage output of the replica is amplified and the difference between the output and a reference voltage is supplied as feedback to the control terminal of the transconductance devices to bias the transconductance devices to near threshold. The biasing is replicated at the frequency doubler to compensate for PVT variations. A PTAT current source tied to the output of the replica regulates an average output current of the frequency multiplication circuit.