A flip chip circuit comprising: a semiconductor substrate; a power amplifier provided on the semiconductor substrate; and a metal pad configured to receive an electrically conductive bump for connecting the flip chip to external circuitry. At least a portion of the power amplifier is positioned directly between the metal pad and the semiconductor substrate.

The disclosure presents a method and an amplifier system for minimizing variation in an acoustical signal caused by variation in gain of an amplifier, comprising a battery for providing a supply voltage to the amplifier, a digital signal processor for providing the acoustical signal to the amplifier, a controller unit receiving an enablement signal when the supply voltage is in an offset mode, and based on the enablement signal requesting a measured voltage during a time period, and a first analog-to-digital converter configured for measuring the supply voltage to the amplifier when receiving the request from the controller unit or the first analog-to-digital converter is configured for measuring the supply voltage to the amplifier continuously, and where variations in the measured voltage relates to variations in the supply voltage during the time period. Furthermore, the controller unit is configured to predict offset modes (i.e. changes) in the supply voltage based on the enablement signals and a fitting of the measured voltages, and wherein the controller unit is configured to generate a compensating signal based on the fitting and transmit the compensating signal to the digital signal processor, the digital signal processor is then configured to minimize variation in the acoustical signal at the output of the amplifier by compensating the variation in gain of the amplifier based on the compensating signal.

The disclosure presents a method and an amplifier system for minimizing variation in an acoustical signal caused by variation in gain of an amplifier, comprising a battery for providing a supply voltage to the amplifier, a digital signal processor for providing the acoustical signal to the amplifier, a controller unit receiving an enablement signal when the supply voltage is in an offset mode, and based on the enablement signal requesting a measured voltage during a time period, and a first analog-to-digital converter configured for measuring the supply voltage to the amplifier when receiving the request from the controller unit or the first analog-to-digital converter is configured for measuring the supply voltage to the amplifier continuously, and where variations in the measured voltage relates to variations in the supply voltage during the time period. Furthermore, the controller unit is configured to predict offset modes (i.e. changes) in the supply voltage based on the enablement signals and a fitting of the measured voltages, and wherein the controller unit is configured to generate a compensating signal based on the fitting and transmit the compensating signal to the digital signal processor, the digital signal processor is then configured to minimize variation in the acoustical signal at the output of the amplifier by compensating the variation in gain of the amplifier based on the compensating signal.

A power amplifier output stage includes a first output array group having a first plurality of semiconductor devices, and a first loading adjustment module coupled to the first output array group. The first loading adjustment module is configured to adjust a loading of the first output array group to produce a first power dissipation value associated with the first output array group. The power amplifier output stage further includes a second output array group having a second plurality of semiconductor devices, and a second source loading adjustment module coupled to a second input of the second output array. The second source loading adjustment module is configured to adjust a source loading of the second output array group to produce a second power dissipation value associated with the second output array group, the first power dissipation value being different from the second power dissipation value.

Thermal temperature sensors for power amplifiers are provided herein. In certain implementations, a semiconductor die includes a compound semiconductor substrate, and a power amplifier including a plurality of field-effect transistors (FETs) configured to amplify a radio frequency (RF) signal. The plurality of FETs are arranged on the compound semiconductor substrate as a transistor array. The semiconductor die further includes a semiconductor resistor configured to generate a signal indicative of a temperature of the transistor array. The semiconductor resistor is located adjacent to one end of the transistor array.

A power amplifier circuit includes an amplifier transistor having a base, a collector, a bias circuit, and a first resistance element connected between the base of the amplifier transistor and the bias circuit. The bias circuit includes a voltage generation circuit, a first transistor having a base to which a first direct-current voltage is supplied, and an emitter from which the bias current or voltage is supplied, a second transistor having a base to which a second direct-current voltage is supplied, and an emitter connected to the emitter of the first transistor, a signal supply circuit disposed between the base of the amplifier transistor and the base of the second transistor, and an impedance circuit disposed between the base of the first transistor and the base of the second transistor.

An output stage of an operational amplifier includes a low voltage (LV) metal oxide semiconductor (MOS) device and a dynamic current limit circuit. An output current of the operational amplifier flows through the LV MOS device. The dynamic current limit circuit is configured to sense a drain voltage of the LV MOS device and increase a clamping voltage for the LV MOS device when the drain voltage of the LV MOS device is less than a threshold voltage.

Describe is a buffer which comprises: a differential source follower coupled to a first input and a second input; first and second current steering devices coupled to the differential source follower; and a current source coupled to the first and second current steering devices. The buffer provides high supply noise rejection ratio (PSRR) together with high bandwidth.

A method for eliminating unstable noise is provided and applicable to a sound recording device and implemented by a codec. The method includes: activating the sound recording device to start recording; setting a suppression duration and a cutoff frequency switching duration according to unstable noise and a DC offset value of the sound recording device; processing a front-end audio of a recorded sound by a filter having a first cutoff frequency to make the unstable noise in the front-end audio quickly converge, and outputting a filtered audio signal; suppressing the filtered audio signal according to the suppression duration to eliminate the unstable noise; and adjusting the first cutoff frequency of the filter to a second cutoff frequency according to the cutoff frequency switching duration, where the first cutoff frequency is greater than the second cutoff frequency. A device for eliminating unstable noise is also provided.

A surface acoustic wave device including a piezoelectric layer, an interdigital transducer electrode over the piezoelectric layer, and a polymeric roof layer arranged over the piezoelectric layer and interdigital transducer electrode. The polymeric roof layer is spaced apart from the piezoelectric layer to define a cavity to accommodate the interdigital transducer electrode. The polymeric roof layer is supported along a span of the polymeric roof layer by at least one pillar. The thermal conductivity of the pillar is greater than the thermal conductivity of the polymeric roof layer. Related wafer-level packages, radio frequency modules and wireless communication devices are also provided.