A conversion circuit for converting a current signal into a first output voltage signal, where the current signal flows through a sensing component, is provided. The conversion circuit includes: a first current eliminating circuit, configured to eliminate a first current in the current signal. The first current eliminating circuit includes: a current sample and hold circuit; and a current driving circuit, coupled between the sensing component and the current sample and hold circuit; a second current eliminating circuit, coupled to the sensing component and configured to eliminate a second current in the current signal; and an integrating circuit, coupled to the sensing component and configured to integrate a third current in the current signal, and output a first input voltage signal between a first integration output terminal and a second integration output terminal.

A ripple pre-amplification based fully integrated LDO pertains to the technical field of power management. The positive input terminal of a transconductance amplifier is connected to a reference voltage Vref, and the negative input terminal of the transconductance amplifier is connected to the feedback voltage V.sub.fb. The output terminal of the transconductance amplifier is connected to the negative input terminal of a transimpedance amplifier and the negative input terminal of an error amplifier. The positive input terminal of the transimpedance amplifier is connected to the ground GND, and the output terminal of the transimpedance amplifier is connected to the positive input terminal of the error amplifier. The gate terminal of the power transistor M.sub.P is connected to the output terminal of the error amplifier, the source terminal of the power transistor M.sub.P is connected to an input voltage V.sub.IN, and the drain terminal of the power transistor M.sub.P is grounded.

An ultrasound circuit comprising a trans-impedance amplifier (TIA) with built-in time gain compensation functionality is described. The TIA is coupled to an ultrasonic transducer to amplify an electrical signal generated by the ultrasonic transducer in response to receiving an ultrasound signal. The TIA is, in some cases, followed by further analog and digital processing circuitry.

Embodiments of an amplifiers and integrated circuits include a first transistor and a second transistor. A second current-carrying terminal of the first transistor may be coupled to a first current-carrying terminal of the second transistor and the control terminal of the second transistor may be coupled to a low impedance alternating current (AC) potential node. A bias network that includes a first circuit element and a second circuit element couples the second current-carrying terminal of the second transistor to the control terminal of the second transistor. The first circuit element may be configured to apply a portion of a potential at the second current-carrying terminal of the second transistor to the control terminal of the second transistor, and the second circuit element may be coupled between the control terminal of the second transistor and a fixed potential.

A line receiver comprising a switched capacitor circuit and a buffer is described. The buffer may be configured to receive, through the switched capacitor circuit, an analog signal. In response, the buffer may provide an output signal to a load, such as an analog-to-digital converter. The switched capacitor circuit may be controlled by a control circuitry, and may charge at least one capacitive element to a desired reference voltage. The reference voltage may be selected so as to bias the buffer with a desired DC current, and consequently, to provide a desired degree if linearity. The line receiver may further comprise a bias circuit configured to generate the reference voltage needed to bias the buffer with the desired DC current.

In accordance with embodiments of the present disclosure, a system may include a playback path and a control circuit. The playback path may have a playback input for receiving an input signal and configured to generate at a playback path output an output signal based on the input signal, wherein the playback path is configured to operate in a plurality of operational modes. The control circuit may be configured to receive a first signal from within the playback path and indicative of the input signal, receive a second signal generated from the input signal externally to the playback path, and select a selected operational mode from the plurality of operational modes based on the first signal and the second signal.

In accordance with embodiments of the present disclosure, a system may include a playback path and a control circuit. The playback path may have a playback input for receiving an input signal and configured to generate at a playback path output an output signal based on the input signal, wherein the playback path is configured to operate in a plurality of operational modes. The control circuit may be configured to receive a first signal from within the playback path and indicative of the input signal, receive a second signal generated from the input signal externally to the playback path, and select a selected operational mode from the plurality of operational modes based on the first signal and the second signal.

A driver circuit including a first op-amp, a second op-amp, and a power switching circuit is provided. The first op-amp includes a first input stage circuit for generating a first amplified signal and a first output stage circuit. The second op-amp includes a second input stage circuit for generating a second amplified signal and a second output stage circuit. The power switching circuit includes a first output terminal for outputting one of the first amplified signal and the second amplified signal and a second output terminal for outputting the other of the first amplified signal and the second amplified signal. The power switching circuit is configured to switch a first power supply for both the first input stage circuit and the second input stage circuit between a first supply voltage and a second supply voltage in response to the control signal.

Described examples include Ethernet physical layer (PHY) interface integrated circuits with transmit interface circuitry for transmitting data to an Ethernet network through a magnetic interface, which includes a voltage mode first amplifier with an output that generates a first voltage signal from a supply voltage according to a data input signal. The transmit interface circuit also includes a feedforward second amplifier circuit with an output stage that operates in a first mode to generate a current signal from the supply voltage according to the first voltage signal and to provide the current signal to the first amplifier output to boost a peak voltage at the output above the supply voltage to facilitate support for higher peak signal voltage swings for 10Base-T applications while using 2.5 volt or other low voltage supply levels.

Described examples include Ethernet physical layer (PHY) interface integrated circuits with transmit interface circuitry for transmitting data to an Ethernet network through a magnetic interface, which includes a voltage mode first amplifier with an output that generates a first voltage signal from a supply voltage according to a data input signal. The transmit interface circuit also includes a feedforward second amplifier circuit with an output stage that operates in a first mode to generate a current signal from the supply voltage according to the first voltage signal and to provide the current signal to the first amplifier output to boost a peak voltage at the output above the supply voltage to facilitate support for higher peak signal voltage swings for 10Base-T applications while using 2.5 volt or other low voltage supply levels.