H03F3/50

Voltage follower circuit

A voltage follower circuit according to an embodiment includes first and second paths, the first path includes a first nMOS transistor and a first pMOS transistor, the second path includes a second nMOS transistor and a second pMOS transistor, an input voltage is supplied to the gate of the first nMOS transistor, an output voltage is supplied to the gate of the second nMOS transistor, a voltage lower than the output voltage is supplied to the gate of the first pMOS transistor, and a voltage lower than the input voltage is supplied to the gate of the second pMOS transistor.

AN AMPLIFICATION SYSTEM FOR CONTINUOUSLY ADJUSTING AMPLIFICATION GAIN OF A HIGH FREQUENCY WEAK SIGNAL FOR MASS SPECTROMETERS

An amplification system includes a first amplification module, a second amplification module, a third amplification module I, a fourth amplification module I, a first load, a third amplification module II, a fourth amplification module II and a second load. An output terminal of the first amplification module is connected to an input terminal of the second amplification module; output terminals of the second amplification module are connected to an input terminal of the third amplification module I and an input terminal of the third amplification module II. An output terminal of the third amplification module I is connected to an input terminal of the first load through the fourth amplification module I. An output terminal of the third amplification module II is connected to an input terminal of the second load through the fourth amplification module II.

ENVELOPE TRACKING INTEGRATED CIRCUIT OPERABLE ACROSS WIDE MODULATION BANDWIDTH
20240014787 · 2024-01-11 ·

An envelope tracking (ET) integrated circuit (ETIC) operable across wide modulation bandwidth is disclosed. The ETIC includes at least two auxiliary voltage outputs coupled to a high-bandwidth power amplifier circuit that has a lower equivalent capacitance, and thus a higher impedance resonance frequency. The ETIC also includes a pair of ET voltage circuits configured to generate a pair of ET voltages, respectively. To help mitigate potential distortion in the ET voltages, a control circuit is configured to couple the ET voltage circuits exclusively to the auxiliary voltage outputs when the ETIC needs to operate with a high modulation bandwidth (e.g., 200 MHz). Given the higher impedance resonance frequency of the high-bandwidth power amplifier circuit, it is possible to increase separation between an energy spectrum of a voltage disturbance and an energy spectrum of the high modulation bandwidth, thus helping to reduce the potential distortion in the ET voltages.

Battery Triggering For Activation Of An Optical Data Interconnect System
20200295846 · 2020-09-17 ·

A system for optical data interconnect of a source and a sink includes a first HDMI compatible electrical connector able to receive electrical signals from the source. A first signal converter is connected to the first HDMI compatible electrical connector and includes electronics for conversion of TMDS or FRL electrical signals to optical signals, with the electronics including an optical conversion device. At least one optical fiber is connected to the first signal converter. A second signal converter is connected to the at least one optical fiber and includes electronics for conversion of optical signals to differential electrical signals. A power module for the second signal converter includes a power tap connected to TMDS or FRL circuitry and a first voltage regulator connected to the power tap to provide power to an electrical signal amplifier. A rechargeable battery module is used to trigger power activation of connected ports, with the battery module being connected to the power tap. A second HDMI compatible electrical connector is connected to the second signal converter and able to send signals to the sink.

Battery Triggering For Activation Of An Optical Data Interconnect System
20200295846 · 2020-09-17 ·

A system for optical data interconnect of a source and a sink includes a first HDMI compatible electrical connector able to receive electrical signals from the source. A first signal converter is connected to the first HDMI compatible electrical connector and includes electronics for conversion of TMDS or FRL electrical signals to optical signals, with the electronics including an optical conversion device. At least one optical fiber is connected to the first signal converter. A second signal converter is connected to the at least one optical fiber and includes electronics for conversion of optical signals to differential electrical signals. A power module for the second signal converter includes a power tap connected to TMDS or FRL circuitry and a first voltage regulator connected to the power tap to provide power to an electrical signal amplifier. A rechargeable battery module is used to trigger power activation of connected ports, with the battery module being connected to the power tap. A second HDMI compatible electrical connector is connected to the second signal converter and able to send signals to the sink.

IMAGE SENSOR AND OPERATING METHOD THEREOF

An image sensor and an operating method of the image sensor are provided. An image sensor includes a pixel array including a plurality of pixels, a ramp signal generator configured to generate a first ramp signal, a buffer including an amplifier of a super source follower structure and outputting a second ramp signal obtained by buffering the first ramp signal, and an analog-to-digital conversion circuit configured to compare a pixel signal output from the pixel array with the second ramp signal and converting the pixel signal to a pixel value.

BIASING AN AMPLIFIER USING A MIRROR BIAS SIGNAL
20200259472 · 2020-08-13 ·

Disclosed are methods for biasing amplifiers and for manufacturing bias circuits bias for biasing amplifiers. A power amplifier bias circuit can include an emitter follower device and an emitter follower mirror device coupled to form a mirror configuration. The emitter follower device can be configured to provide a bias signal for a power amplifier at an output port. The power amplifier bias circuit can include a reference device configured to mirror an amplifying transistor of an amplifying device of the power amplifier. The emitter follower mirror device can be configured to provide a mirror bias signal to the reference device. A node between the emitter follower device and the emitter follower mirror device can have a voltage of approximately twice a base-emitter voltage (2Vbe) of the amplifying transistor.

BIASING AN AMPLIFIER USING A MIRROR BIAS SIGNAL
20200259472 · 2020-08-13 ·

Disclosed are methods for biasing amplifiers and for manufacturing bias circuits bias for biasing amplifiers. A power amplifier bias circuit can include an emitter follower device and an emitter follower mirror device coupled to form a mirror configuration. The emitter follower device can be configured to provide a bias signal for a power amplifier at an output port. The power amplifier bias circuit can include a reference device configured to mirror an amplifying transistor of an amplifying device of the power amplifier. The emitter follower mirror device can be configured to provide a mirror bias signal to the reference device. A node between the emitter follower device and the emitter follower mirror device can have a voltage of approximately twice a base-emitter voltage (2Vbe) of the amplifying transistor.

Low-voltage high-speed receiver
10734958 · 2020-08-04 · ·

A line receiver is described. The line receiver may be configured to receive signals transmitted via a communication channel, such as a metal trace on a printed circuit board or a cable. The receiver may comprise a buffer and circuitry for enhancing the trans-conductance gain of the buffer. By enhancing the trans-conductance gain of the buffer, linearity may be improved and susceptibility to process and temperature variations may be limited. Enhancement of the trans-conductance gain may be performed using feedback circuitry coupled to the buffer. The receiver may further comprise mirror circuitry configured to provide a desired current to the load. The receiver may further comprise a gain stage for setting the gain of the receiver to a desired level.

METHODS AND APPARATUSES FOR THRESHOLD VOLTAGE MEASUREMENT AND RELATED SEMICONDUCTOR DEVICES AND SYSTEMS
20200200816 · 2020-06-25 ·

A measurement circuit may include a transistor having a first terminal, a second terminal, and a third terminal, wherein the first terminal is coupled to a first reference voltage. The measurement circuit may further include a first operational amplifier including a first input coupled to the second terminal of the transistor and an output coupled to the third terminal of the transistor. The first operational amplifier may further include a second input configured to receive a second reference voltage. The measurement circuit may also include a first unity-gain voltage follower including a second operational amplifier having a first input coupled to the first input of the first operational amplifier. Methods of measuring a threshold voltage, semiconductor devices, and electronic systems are also described.