In one general aspect, an amplifier can include an input amplifier circuit configured to receive a bias current and receive, as an input, a signal pair connected differentially to the input amplifier circuit, the input amplifier circuit configured to output a differential output signal pair based on the received differential input signal pair, a feedback amplifier circuit configured to receive an average of the differential output signal pair and configured to provide a bias setting output for controlling the bias current, and an output buffer circuit configured to buffer the differential output signal pair, the buffering resulting in a buffered differential output signal pair capable of driving a resistive load.

A system may include a plurality of playback paths comprising an open-loop playback path configured to drive an output load and a closed-loop playback path. The closed-loop playback path may include an outer feedback loop comprising one or more integrators, a quantizer, and an output driver for driving the output load, the outer feedback loop having an outer loop feedback gain and an inner feedback loop comprising the one or more integrators and the quantizer and excluding the output driver, wherein the inner feedback loop has a variable inner loop feedback gain which is adjustable to match the outer loop feedback gain.

A transconductance circuit comprises a first transistor, a second transistor, a first source-degeneration device, a second source-degeneration device, a first feedback device, and a second feedback device. The gate node of the first transistor is coupled to a source node of the second transistor via the first feedback device. The gate node of the second transistor is coupled to a source node of the second transistor via the second feedback device. The source node of the first transistor is coupled to a reference voltage via the first source-degeneration device. The source node of the second transistor is coupled to the reference voltage via the second source-degeneration device.

An analog front-end architecture for a capacitive pressure sensor with a low-noise amplifier unit for amplification of sensor signals from the sensor. The amplifier unit includes first and second integrator units for integrating charges injected into input terminals of the amplifier unit and for outputting integrated charges to output terminals of the amplifier unit, a feedback unit, and a startup unit. The feedback unit reinjects integrated charges from the integrator unit into the input terminals of the amplifier unit. The startup unit is switchable between first and second switching states and is configured, in the first switching state, to route the charges injected into the input terminals past the first integrator unit into the second integrator unit and from the second integrator unit into the feedback unit, and, in the second switching state, to route charges injected into the input terminals directly into the first integrator unit.

An amplifier may include a main signal path having a plurality of stages compensated by feedback elements, the plurality of stages comprising an output stage configured to receive electrical energy from a power supply and an auxiliary path independent of the main signal path and comprising an output stage compensation circuit configured to generate a compensation current proportional to noise present in the power supply and apply the compensation current to cancel a power supply-induced current present in at least one of the feedback elements.

An amplifier circuits inductive/magnetic sensor interface can include a main signal path including one or more amplifiers configured to receive an input signal and to produce an output signal based on the input signal. The input signal may include a square-wave demodulated signal having an associated modulation frequency and an undesired frequency component at twice the modulation frequency of the square-wave demodulated signal. The amplifier circuit may include a gain feedback loop configured to set a gain of the amplifier circuit. The amplifier circuit may include a ripple reduction feedback loop configured to receive an intermediate signal on the main signal path and extract the undesired frequency component of the intermediate signal to produce a filtered version of the intermediate signal and provide the filtered version of the intermediate signal to the main signal path.

A power amplifier includes a two-dimensional matrix of NM active cells formed by stacking main terminals of multiple active cells in series. The stacks are coupled in parallel to form the two-dimensional matrix. The power amplifier includes a driver structure to coordinate the driving of the active cells so that the effective output power of the two-dimensional matrix is approximately NM the output power of each of the active cells.

A voltage comparator (1) has a high switching speed and simplicity of design. It minimizes pulse-width distortion of input digital signals when functioning as a digital input buffer in high speed communications applications. In addition it provides a simple hysteresis circuit (31) that is easily tuneable with a reference current. The hysteresis circuit (31) is dependent on a reference current. This current may be chosen to have a proportionality to temperature, supply, or another selectable parameter, and may be programmable, in order to create the desired hysteresis performance.

In one general aspect, an amplifier can include an input amplifier circuit configured to receive a bias current and receive, as an input, a signal pair connected differentially to the input amplifier circuit, the input amplifier circuit configured to output a differential output signal pair based on the received differential input signal pair, a feedback amplifier circuit configured to receive an average of the differential output signal pair and configured to provide a bias setting output for controlling the bias current, and an output buffer circuit configured to buffer the differential output signal pair, the buffering resulting in a buffered differential output signal pair capable of driving a resistive load.

An amplifier circuit that includes a first amplifier that has a first input that receives an input signal, a second input and an output. The amplifier circuit also includes a second amplifier that has a first input that is coupled to the output of said the amplifier and a second input. The circuit further includes a first impedance network Z1, a second impedance network Z2, a third impedance network Z3 and a fourth impedance network Z4. The first impedance network Z1 is coupled to a load and the second input of the second amplifier, the second impedance Z2 is connected the output of the first amplifier and the second input of the first amplifier, the third impedance Z3 is connected to the output of the first amplifier and the load, the fourth impedance Z4 is connected the output of the second amplifier and the second input of said first amplifier.