A linearization circuit reduces intermodulation distortion in an amplifier that includes a first stage and a second stage. The linearization circuit receives a first signal that includes a first frequency and a second frequency and generates a difference signal having a frequency approximately equal to the difference of the first frequency and the second frequency, generates an envelope signal based at least in part on a power level of the first signal, and adjusts a magnitude of the difference signal based on the envelope signal. When the amplifier receives the first signal at an input terminal, the first stage receives the adjusted signal, and the second stage does not receive the adjusted signal, intermodulation between the adjusted signal and the first signal cancels at least a portion of the intermodulation between the first frequency and the second frequency from the output of the amplifier.

A transistor circuit includes a transistor having a gate terminal and first and second conduction terminals, a first circuit configured to convert an AC input signal of the transistor circuit to a gate bias voltage and to apply the gate bias voltage to the gate terminal of the transistor, a second circuit configured to convert the AC input signal of the transistor circuit to a control voltage, and a switching circuit configured to apply a first voltage to the first conduction terminal of the transistor in response to the control voltage.

A linearization circuit that reduces intermodulation distortion in an amplifier output receives a first signal that includes a first frequency and a second frequency and generates a difference signal having a frequency approximately equal to the difference of the first frequency and the second frequency. The linearization circuit generates an envelope signal based at least in part on a power level of the first signal and adjusts a magnitude of the difference signal based on the envelope signal. When the amplifier receives the first signal at an input terminal and the adjusted signal at a second terminal, intermodulation between the adjusted signal and the first signal cancels at least a portion of the intermodulation products that result from the intermodulation of the first frequency and the second frequency.

A current source with hysteresis for an output circuit includes a tail current transistor, a resistor and a differential pair. The tail current transistor is used for supplying a current to the output circuit. The resistor is coupled to a drain terminal of the tail current transistor. The differential pair, coupled to the resistor, is used for controlling a magnitude of the current supplied to the output circuit. The differential pair includes a first transistor, of which a bulk terminal is coupled to a terminal of the resistor; and a second transistor, of which a bulk terminal is coupled to another terminal of the resistor.

An integrated circuit arrangement for a microphone, a microphone system and a method for adjusting circuit parameters of the microphone are disclosed. In an embodiment an integrated circuit includes an amplifier circuit with a first switchable network circuit for adjusting an amplifier current of the amplifier circuit, the first switchable network circuit comprising a plurality of switches (SW1, . . . ,SWx) each coupled with a first control port of the first switchable network circuit and a control unit coupled with the first control port of the first switchable network circuit and configured to control a setting of the respective switches (SW1, . . . ,SWx) of the first switchable network circuit.

An amplifier includes: a package which includes a pair of edge portions; an input terminal which is provided in the edge portion; output terminals which are provided in the edge portion; a first-stage FET chip which includes an input port directly connected to the input terminal by a bonding wire; a first-stage terminal which is provided in the edge portion and is directly connected to an output port of the first-stage FET chip by a bonding wire; a second-stage terminal which is provided in the edge portion; a second-stage FET chip which includes an output port directly connected to output terminals and by a bonding wire; and an impedance matching capacitor element of which one electrode is connected to the second-stage terminal and the input port of the second-stage FET chip.

This application relates to methods and apparatus for multichannel drivers for driving transducers in different channels. A multichannel driver has a plurality of output stages configured such that two output nodes can be modulated between selected switching voltages with a controlled duty cycle to generate a differential output signal across a respective transducer, each output stage being operable with different switching voltages in different modes of operation. A first set of two or more of the output stages are arranged to receive a voltage output by a capacitive voltage generator to use as a switching voltage. A controller is configured to control the mode of operation and duty-cycle of each of the output stages based on a respective input signal and also based on operation of the other output stages of the first set.

Various envelope tracking amplifiers are presented that can be switched between an ET (envelope tracking) mode and a non-ET mode. Switches and/or tunable components are utilized in constructing the envelope tracking amplifiers that can be switched between the ET mode and the non-ET mode.

A linearization circuit reduces intermodulation distortion in a differential amplifier that includes a first stage and a second stage. The linearization circuit receives a first signal that includes a first frequency and a second frequency and generates a difference signal having a frequency approximately equal to the difference of the first frequency and the second frequency, generates an envelope signal based at least in part on a power level of the first signal, and adjusts a magnitude of the difference signal based on the envelope signal. When the differential amplifier receives the first signal at an input terminal, the first stage receives the adjusted signal, and the second stage does not receive the adjusted signal, intermodulation between the adjusted signal and the first signal cancels at least a portion of the intermodulation between the first frequency and the second frequency from the output of the differential amplifier.

A feedback gate bias circuit for use in radio frequency amplifiers to more effectively control operation of LDFET, GaNFET, GaAsFET, and JFET type transistors used in such circuits. A transistor gate bias circuit that senses drain current and automatically adjusts or biases the gate voltage to maintain drain current independently of temperature, time, input drive, frequency, as well as from device to device variations. Additional circuits to provide temperature compensation, RF power monitoring and drain current control, RF output power leveler, high power gain block, and optional digital control of various functions. A gate bias circuit including a bias sequencer and negative voltage deriver for operation of N-channel depletion mode devices.