A slewing mitigation technique is presented where just the right amount of charge is provided at the switching instant to a switch capacitor circuit so that operational transconductance amplifier (OTA) does not need to provide high peak current. This eliminates slewing altogether and allows using OTAs with less static current for the same settling accuracy.

In an embodiment, a method for shaping a PWM signal includes: receiving an input PWM signal; generating an output PWM signal based on the input PWM signal by: when the input PWM signal transitions with a first edge of the input PWM signal, transitioning the output PWM signal with a first edge of the output PWM signal; and when the input PWM signal transitions with a second edge before the first edge of the output PWM signal transitions, delaying a second edge of the output PWM signal based on the first edge of the output PWM signal.

The amplifier load current cancellation in a current integrator comprises applying an input current to an operational transconductance amplifier provided with an integration capacitor for current integration, leading an output current of the operational transconductance amplifier through a sensing resistor, thus producing a voltage drop over the sensing resistor, generating a cancellation current dependent on the voltage drop over the sensing resistor, and injecting the cancellation current to the output current, before or after the output current passes the sensing resistor, thus eliminating a dependence of the output current on the input current.

An operational amplifier includes a single-stage amplifier and a current controller. The single-stage amplifier receives an input signal, and amplifies the input signal to generate an output signal, wherein the single-stage amplifier includes a voltage controlled current source circuit that operates in response to a bias voltage input. The current controller receives the input signal, and generates the bias voltage input according to the input signal.

This description relates, generally, to protecting a circuit from an input voltage. Various examples include an apparatus including one or more circuits to draw current from, or provide current to, a pair of connectors for an input circuit. The connectors may be for electrical coupling to first and second terminals of a twisted pair. The one or more circuits may be at least partially responsive to positive and negative biasing signals. The apparatus may additionally include an operational amplifier to generate the positive and negative biasing signals. The operational amplifier may include: a first input terminal at least partially responsive to a reference voltage and a second input terminal at least partially responsive to a common-mode voltage of the input circuit. Related systems and methods are also disclosed.

A digital signal generator apparatus and method is described. The digital signal generator includes a counter, an integrator and a comparator. The counter counts up or down from an initial counter value dependent on a counter control input. The comparator has a first input coupled to the counter output, a threshold input and a comparator output coupled to the counter control input. The integrator has an input coupled to the counter output and an output coupled to the digital signal generator output. The digital signal generator determines the count direction after the initial direction dependent on the comparison between a threshold value applied to the threshold input and the counter output value. The digital signal generator may implement the generation of a waveform having an approximation to a raised cosine function. The generated waveform may be used for audio artefact reduction in an audio amplifier during mute or unmute operations or during power up power down operations.

An integrator and an analog-to-digital converter are provided. The analog-to-digital converter includes the integrator, a comparison circuit and a control logic circuit. The integrator includes an operational amplifier, offset capacitors, input capacitors, integral capacitors and controllable switches. The input capacitors and the integral capacitors are connected to the operational amplifier via controllable switches, so that the integrator operates in various operation modes. Operation states of the offset capacitors in a first phase and a second phase of an operation cycle are controlled by switching on or off the controllable switches. Therefore, an offset voltage of the integrator is eliminated, and conversion efficiency and conversion accuracy of the analog-to-digital converter is improved.

An embodiment of this disclosure provides an automated payment apparatus. The apparatus includes a photodiode current integrator configured to charge an integration capacitor. The photodiode current integrator includes a first feedback resistor connected along a negative feedback path of an operational amplifier between an output of the operational amplifier and a negative input of the operational amplifier. The photodiode current integrator also includes a second feedback resistor connected along a positive feedback path of the operational amplifier between the output of the operational amplifier and a positive input of the operational amplifier. The photodiode current integrator also includes an integration capacitor connected to the positive input of the operational amplifier and to common circuit ground. The photodiode current integrator also includes a reset switch connected to the positive input of the operational amplifier and to common circuit ground or to additional voltage source. The photodiode current integrator also includes a photodiode connected to the positive input and the negative input of the operational amplifier.

Disclosed preamplifier circuit comprises amplifier arranged in first current path between input node and output node of the preamplifier circuit. Feedback capacitor is arranged in second current path between said input and output nodes. Feedback circuit having adjustable transfer function is arranged in third current path between said input and output nodes. Reset switch arranged in said third current path enables selectively coupling output of the feedback circuit to input of the amplifier and decoupling output of the feedback circuit from input of the amplifier. Loop controller is arranged selectively, in dependence of voltage in the preamplifier circuit, one of open reset switch to set preamplifier circuit in normal operating mode and close reset switch to set preamplifier circuit in reset mode. Loop controller is arranged to adjust the transfer function of the feedback circuit at least in part in dependence of the current operating mode of the preamplifier circuit.

An operational amplifier includes a single-stage amplifier and a current controller. The single-stage amplifier receives an input signal, and amplifies the input signal to generate an output signal, wherein the single-stage amplifier includes a voltage controlled current source circuit that operates in response to a bias voltage input. The current controller receives the input signal, and generates the bias voltage input according to the input signal. The bias voltage input includes a first bias voltage, a second bias voltage, a third bias voltage, and a fourth bias voltage. None of the first bias voltage, the second bias voltage, the third bias voltage, and the fourth bias voltage is directly set by the input signal of the single-stage amplifier.