Patent classifications
H03F2200/372
Two-stage LNA with mutual coupling
Compact low noise amplifiers that have wide-band coverage while meeting necessary input matching and output matching characteristics. Embodiments include a wide-band, two-stage LNA with minimum degradation in performance compared to multiple narrow-band, single-stage LNAs. A generalized embodiment includes a first amplifier stage having a terminal coupled to a mutually coupled inductor circuit and to a second amplifier stage. The second amplifier stage includes a terminal coupled to the mutually coupled inductor circuit. The mutually coupled inductor circuit comprises electromagnetically coupled inductors L1, L2. Second terminals of the first and second amplifier stages are coupled to respective degeneration inductors. The electromagnetically coupled inductors L1, L2 of the inductor circuit substantially increase the output bandwidth of the LNA with minimum degradation in performance.
CHOPPER CIRCUIT FOR MULTIPATH CHOPPER AMPLIFIER AND CORRESPONDING METHOD OF CHOPPING
A chopper circuit (100) for a multipath chopper amplifier (201) is described. The chopper circuit (100) comprises a first chopper device (110) in a first circuit path (111), wherein the first chopper device (110) is configured to be controlled by a first clock signal (315), which has a first frequency; and a second chopper device (120) in a second circuit path (121), parallel to the first circuit path (111), wherein the second chopper device (120) is configured to be controlled by a second clock signal (325), which has a second frequency, wherein the first frequency is greater than the second frequency. Furthermore, a corresponding method of chopping an input signal (102) is described.
RADIO FREQUENCY FRONT END WITH DIFFERENTIAL PATHS
A radio frequency circuit assembly architecture is disclosed. An example radio frequency circuit assembly architecture comprises a signal contact and an antenna contact, a power amplifier module connected in a signal path between the signal contact and the antenna contact, the signal path between the power amplifier module and the antenna contact including a differentially signaled portion having a first path and a second path, and a pair of band pass filters, a first band pass filter of the pair of band pass filters being connected in the first path of the differentially signaled portion and a second band pass filter of the pair of band pass filters being connected in the second path of the differentially signaled portion.
NOISE DETECTING CIRCUIT AND ASSOCIATED SYSTEM AND METHOD
A noise detecting circuit including an amplifier circuit, a filtering circuit and a comparing circuit. The amplifier circuit is arranged to amplify an input signal and output an amplified signal, wherein the input signal is received from a circuit to be detected and indicates a noise level of the circuit to be detected. The filtering circuit is coupled to the amplifier circuit and arranged to filter the amplified signal and output a filtered signal. The comparing circuit is coupled to the filtering circuit and arranged to compare the filtered signal to a reference voltage and output an output signal indicating the noise level of the circuit to be detected.
Radio frequency level indicator
A radio frequency (RF) receiver circuit is disclosed. The RF receiver circuit includes a variable gain amplifier, configured to receive an input RF signal, and to generate an amplified RF signal based on the input RF signal, where a gain of the variable gain amplifier is variable. The RF receiver circuit also includes an RF level indicator circuit, configured to sample the amplified RF signal at non-periodic sampling intervals to generate a plurality of sampled RF signals, and to compare the sampled RF signals with one or more thresholds to generate a plurality of comparison result signals. The gain of the variable gain amplifier is determined based at least in part on the comparison result signals.
Transimpedance amplifier circuit
The invention relates to a circuit containing a transimpedance amplifier for converting two input currents into two output voltages, having a first amplifier part containing a first input, to which a first input voltage is applied, and into which a first input current flows, and having a second amplifier part containing a second input, to which a second input voltage is applied and into which a second input current flows, wherein the first amplifier part and the second amplifier part are connected to a common supply voltage, the first amplifier part and the second amplifier part are connected to a common current source, the input of the first amplifier part and the input of the second amplifier part have a differing direct voltage, and the first amplifier part and the second amplifier part are designed such that an output voltage of the first amplifier part is proportional to the input current of the first amplifier part and an output voltage of the second amplifier part is proportional to an input current of the second amplifier part.
Integrated circuit and light receiver
An integrated circuit includes an amplifier for amplifying an electric current signal from an external light receiving element, and a low-pass filter. The low-pass filter has a resistor and a capacitor serial-connection in which multiple capacitive elements are serially connected. With respect to the resistor in the low-pass filter, one end thereof is connected to a power terminal to which the bias voltage is inputted, and the other end thereof is connected to an input terminal of the capacitor serial-connection and to a bias application electrode of the light receiving element through which the bias voltage is applied. With respect to the capacitor serial-connection in the low-pass filter, each connection terminal between two of the serially connected capacitive elements and an output terminal of the capacitor serial-connection, are connected to their respective capacitance terminals to which a ground potential as a reference for the bias voltage is connected selectively.
Power amplifier circuit
The present disclosure provides a power amplifier circuit capable of suppressing the occurrence of noises while enabling control of an output power level. The power amplifier circuit includes a first transistor that amplifies a first signal; a bias circuit that supplies a bias current or voltage based on a control signal to the first transistor; a second transistor to which a control current based on the control signal is supplied, which has an emitter or a source thereof connected to a collector or a drain of the first transistor, and from which a second signal obtained by amplifying the first signal is output; and a first feedback circuit provided between the collector or the drain of the second transistor and the base or the gate of the second transistor.
SEMICONDUCTOR DEVICE AND OPERATION METHOD THEREOF
A semiconductor device including an amplifier with improved accuracy is provided. The semiconductor device includes a switch, a capacitor, a chopping circuit, and the amplifier. The amplifier includes a non-inverting input terminal, an inverting input terminal, an inverting output terminal, and a non-inverting output terminal. The semiconductor device, with use of the switch and the capacitor, has a function of sampling and holding a first potential and a second potential input in a first period. The chopping circuit is provided on each of the input terminal side and the output terminal side of the amplifier, and the first potential and the second potential are each input to either one of the non-inverting input terminal and the inverting input terminal in a second period. In a third period, the first potential and the second potential are each input to either one of the non-inverting input terminal and the inverted input terminal, which is different from the second period. In a similar manner, the inverting output terminal and non-inverting output terminal are replaced by the chopping circuit in the second period and the third period to be output from the semiconductor device.
Receiver architectures with parametric circuits
An RF receiver circuit configuration and design is limited by conditions and frequencies to simultaneously provide steady state low-noise signal amplification, frequency down-conversion, and image signal rejection. The RF receiver circuit may be implemented as one of a CMOS single chip device or as part of an integrated system of CMOS components.