H03G3/008

Constant level-shift buffer amplifier circuits
11114986 · 2021-09-07 · ·

A push-pull dynamic amplifier is operable in reset and amplification phases. The amplifier includes first NMOS and PMOS input transistors that are electrically coupled to a first input terminal and a first output terminal. Second NMOS and PMOS input transistors are electrically coupled to a second input terminal and a second output terminal. First and second reset switches are electrically coupled to the first and second output terminals, respectively. A power supply switch is electrically coupled to the first and the second PMOS transistors, and a ground switch is electrically coupled to the first and the second NMOS transistors. During the reset phase, the reset switches are closed and the power supply switch and the ground switch are opened. During the amplification phase, the reset switches are opened and the power supply switch and the ground switch are closed.

Constant Level-Shift Buffer Amplifier Circuits
20210050825 · 2021-02-18 ·

A push-pull dynamic amplifier is operable in reset and amplification phases. The amplifier includes first NMOS and PMOS input transistors that are electrically coupled to a first input terminal and a first output terminal. Second NMOS and PMOS input transistors are electrically coupled to a second input terminal and a second output terminal. First and second reset switches are electrically coupled to the first and second output terminals, respectively. A power supply switch is electrically coupled to the first and the second PMOS transistors, and a ground switch is electrically coupled to the first and the second NMOS transistors. During the reset phase, the reset switches are closed and the power supply switch and the ground switch are opened. During the amplification phase, the reset switches are opened and the power supply switch and the ground switch are closed.

Method for gain control and related wireless receivers and devices

This disclosure provides a method for gain control in a wireless receiver. The wireless receiver comprises a first receiver chain adapted to receive a first signal in a first frequency range, a second receiver chain adapted to receive a second signal in a second frequency range, and a common amplifier module operatively connected to the first receiver chain and the second receiver chain. The method comprises determining a first target gain level for a first path comprising the common amplifier module and the first receiver chain, and determining a second target gain level for a second path comprising the common amplifier module and the second receiver chain. The method comprises setting a gain GA of the common amplifier module and a gain GRx1 in the first receiver chain and a gain GRx2 in the second receiver chain based on the first target gain level and the second target gain level.

Interface circuit for a capacitive accelerometer sensor

The present invention relates to an interface circuit for a capacitive accelerometer sensor for measuring an acceleration value sensed by the sensor. The interface circuit comprises a plurality of electrical switches and three programmable capacitors. Two of the programmable capacitors are arranged to implement gain trimming of the interface circuit, while one of the programmable capacitors is arranged to implement acceleration range selection.

I—V conversion module

An I-V conversion module includes: a current output type sensor, a pre-integral circuit, a charge transfer auxiliary circuit, and an I-V transformation circuit including an inverting amplifier. The current output type sensor is connected to an input end of the I-V transformation circuit through the pre-integral circuit. The charge transfer auxiliary circuit connects in parallel with the inverting amplifier. When both the pre-integral circuit and the charge transfer auxiliary circuit are open circuits, the pre-integral circuit pre-integrates the induction current output by the current output type sensor to store pre-integral charges. When both pre-integral circuit and the charge transfer auxiliary circuit are closed circuits, the pre-integral charges are transferred to the I-V transformation circuit. In these embodiments, both the time for establishing the I-V conversion module and power consumption can be reduced.

Radio Frequency Signal Attenuator And Method of Operation Thereof
20200177164 · 2020-06-04 ·

An embodiment attenuator includes a plurality of circuits coupled in series. A respective circuit includes a first capacitor connected between an input node of the respective circuit and an output node of the respective circuit, and a second capacitor connected between the output node of the respective circuit and a reference node. The output node of the respective circuit, other than a last circuit of the plurality of circuits, is connected to the input node of a successive circuit. The attenuator further includes a plurality of selectors, in which the respective circuit is associated with a respective selector that is coupled between the output node of the respective circuit and an output node of the attenuator.

Radio frequency signal attenuator and method of operation thereof
10560071 · 2020-02-11 · ·

An embodiment attenuator includes a plurality of circuits coupled in series. A respective circuit includes a first capacitor connected between an input node of the respective circuit and an output node of the respective circuit, and a second capacitor connected between the output node of the respective circuit and a reference node. The output node of the respective circuit, other than a last circuit of the plurality of circuits, is connected to the input node of a successive circuit. The attenuator further includes a plurality of selectors, in which the respective circuit is associated with a respective selector that is coupled between the output node of the respective circuit and an output node of the attenuator.

Constant level-shift buffer amplifier circuits
11894813 · 2024-02-06 · ·

A push-pull dynamic amplifier is operable in reset and amplification phases. The amplifier includes first NMOS and PMOS input transistors that are electrically coupled to a first input terminal and a first output terminal. Second NMOS and PMOS input transistors are electrically coupled to a second input terminal and a second output terminal. First and second reset switches are electrically coupled to the first and second output terminals, respectively. A power supply switch is electrically coupled to the first and the second PMOS transistors, and a ground switch is electrically coupled to the first and the second NMOS transistors. During the reset phase, the reset switches are closed and the power supply switch and the ground switch are opened. During the amplification phase, the reset switches are opened and the power supply switch and the ground switch are closed.

PROCESS OF USING A SUBMERGED COMBUSTION MELTER TO PRODUCE HOLLOW GLASS FIBER OR SOLID GLASS FIBER HAVING ENTRAINED BUBBLES, AND BURNERS AND SYSTEMS TO MAKE SUCH FIBERS
20190263712 · 2019-08-29 ·

Processes and systems for producing glass fibers having regions devoid of glass using submerged combustion melters, including feeding a vitrifiable feed material into a feed inlet of a melting zone of a melter vessel, and heating the vitrifiable material with at least one burner directing combustion products of an oxidant and a first fuel into the melting zone under a level of the molten material in the zone. One or more of the burners is configured to impart heat and turbulence to the molten material, producing a turbulent molten material comprising a plurality of bubbles suspended in the molten material, the bubbles comprising at least some of the combustion products, and optionally other gas species introduced by the burners. The molten material and bubbles are drawn through a bushing fluidly connected to a forehearth to produce a glass fiber comprising a plurality of interior regions substantially devoid of glass.

LNA with programmable linearity
10284151 · 2019-05-07 · ·

A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a common source input stage and a common gate output stage can be turned on or off using the gate of the output stage. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input stage of each cascode. Further switches used for switching degeneration inductors, gate/sources caps and gate to ground caps for each legs can be used to further improve the matching performance of the invention.