A battery disconnecting device has a first input and a second input to which a battery can be connected, whereby the disconnecting device also has a first output and a second output to which an electric component can be connected, whereby at least one first circuit breaker is arranged between the first input and the first output, and at least one second circuit breaker is arranged between the second input and the second output, whereby the first circuit breaker is at least a transistor and the second circuit breaker is a relay.

An embodiment of a semiconductor device includes a plurality of transistor sections separated from each other and a plurality of diode sections separated from each other. Each transistor section includes an emitter electrode and a collector electrode. Each diode section includes an anode electrode and a cathode electrode. Each transistor section is electrically coupled to a common gate pad. A ratio between an active transistor part and an active diode part of the semiconductor device is adjustable by activating a first number of the transistor sections by selectively contacting the emitter electrodes and the collector electrodes of the first number of transistor sections, and by activating a second number of the diode sections by selectively contacting the anode electrodes and the cathode electrodes of the second number of diode sections.

A semiconductor module comprises reverse conducting IGBT connected in parallel with a wide bandgap MOSFET, wherein each of the reverse conducting IGBT and the wide bandgap MOSFET comprises an internal anti-parallel diode. A method for operating a semiconductor module with the method including the steps of: determining a reverse conduction start time, in which the semiconductor module starts to conduct a current in a reverse direction, which reverse direction is a conducting direction of the internal anti-parallel diodes; applying a positive gate signal to the wide bandgap MOSFET after the reverse conduction start time; determining a reverse conduction end time based on the reverse conduction start time, in which the semiconductor module ends to conduct a current in the reverse direction; and applying a reduced gate signal to the wide bandgap MOSFET a blanking time interval before the reverse conduction end time, the reduced gate signal being adapted for switching the wide bandgap MOSFET into a blocking state.

A method comprises configuring a power converter to operate as a boost converter, the power converter comprising a low side switch and a high side switch, during a first dead time after turning off the low side switch and before turning on the high side switch, configuring the power converter such that a current of the power converter flows through a high speed diode, and after turning on the high side switch, configuring the power converter such that the current of the power converter flows through a low forward voltage drop diode.

A differential signal input buffer is disclosed. The differential signal input buffer may receive a differential signal that includes a first signal and a second signal and may be divided into a first section and a second section and. The first section may buffer and/or amplify the first signal based on a first level-shifted second signal. The second section may buffer and/or amplify the second signal based on a first level-shifted first signal. In some implementations, the first section may buffer and/or amplify the first signal based on a second level-shifted second signal. Further, in some implementations, the second section may buffer and/or amplify the second signal based on a second level-shifted first signal.

Methods and devices are disclosed for compensating for device property variations across a wafer. The method comprises determining an output of a first device based on an input and determining an output of a second device based on the input. The second device is located at a different position with respect to a center of the wafer than a position of the first device with respect to the center of the wafer. The method further comprises determining a difference between the output of the first device and the output of the second device, the difference arising at least in part from the difference in position of the first and second devices. The method further comprises altering the first device such that the output of the first device based on the input substantially matches the output of the second device based on the input.

Methods and devices are disclosed for compensating for device property variations across a wafer. The method comprises determining an output of a first device based on an input and determining an output of a second device based on the input. The second device is located at a different position with respect to a center of the wafer than a position of the first device with respect to the center of the wafer. The method further comprises determining a difference between the output of the first device and the output of the second device, the difference arising at least in part from the difference in position of the first and second devices. The method further comprises altering the first device such that the output of the first device based on the input substantially matches the output of the second device based on the input.

A drive circuit drives a switch that has first and second terminals and a control terminal. The drive circuit includes a discharge path, a capacitor, an AC suppressor and a DC voltage generator. The discharge path connects the control terminal and the second terminal. The capacitor has a high-potential terminal connected to the second terminal side and a low-potential terminal connected to the control terminal side. The AC suppressor has a first end connected to a part of the discharge path between the high-potential terminal the second terminal. The DC voltage generator has a connection terminal connected to a second end of the AC suppressor. The DC voltage generator regulates electric current flowing between the connection terminal and the AC suppressor so as to keep the potential of the part of the discharge path between the high-potential terminal and the second terminal higher than the potential of the low-potential terminal.

A plurality of drive circuits each drive a corresponding one of a plurality of power semiconductor elements connected in parallel. Each of the drive circuits includes a control command unit, a current detector, a differentiator, and an integrator. The current detector detects a gate current that flows into a gate terminal of a corresponding one of the power semiconductor elements after the control command unit outputs a turn-on command. The differentiator performs time differentiation of the gate current detected by the current detector. The integrator performs time integration of the gate current detected by the current detector. Based on a differential value and an integral value in each of the drive circuits, the determination unit determines whether an overcurrent state occurs or not in any of the plurality of power semiconductor elements.

In a method for actuating reverse-conducting semiconductor switches, a plurality of reverse-conducting semiconductor switches is arranged in a parallel circuit. Gate contacts of switching elements of at least two of the plurality of reverse-conducting semiconductor switches are controlled by actuating the at least two of the reverse-conducting semiconductor switches at least intermittently with different voltages, thereby allowing to influence a behavior of the switching elements of the at least two of the reverse-conducting semiconductor switches in IGBT (Insulated-Gate-Bipolar-Transistor) and a behavior in diode mode.