A semiconductor device includes a switching circuit that switches between conducting state and disconnected state. The switching circuit includes first and second switching elements electrically connected in parallel. The first switching element is an IGBT, and the second switching element is a MOSFET. When a current flowing in the switching circuit is less than a first current value, the second switching element has a lower voltage than the first switching element. When the current flowing in the switching circuit is not less than a second current value and not greater than a third current value, the threshold voltage of the second switching element ranges from 1.0 V to +0.4 V relative to the threshold voltage of the first switching element. The third current value is not greater than the rated current of the switching circuit. The first current value is less than the third current value.

The present disclosure relates to a semiconductor switch leg S for a Power Electronic (PE) converter (1). The switch leg comprises a plurality of parallel connected semiconductor devices Sa-d. Each semiconductor device is connected with a positive conductor a-d+ connecting the semiconductor device to a positive terminal of an energy storing device (2) of the converter, and a negative conductor a-d-connecting the semiconductor device to a negative terminal of the energy storing device (2) of the converter, the semiconductor device together with the positive conductor and the negative conductor forming a current path across the energy storing device. The semiconductor switch leg comprises a plurality of magnetic coupling devices 3a-d, each magnetic coupling device being arranged between the two current paths of respective two neighbouring semiconductor devices of the plurality of semiconductor devices such that the current path of one of the two semiconductor devices and the current path of the other of the two semiconductor devices pass via the magnetic coupling device, and such that each current path passes via two of said plurality of magnetic coupling devices.

The present disclosure relates to a semiconductor switch leg S for a Power Electronic (PE) converter (1). The switch leg comprises a plurality of parallel connected semiconductor devices Sa-d. Each semiconductor device is connected with a positive conductor a-d+ connecting the semiconductor device to a positive terminal of an energy storing device (2) of the converter, and a negative conductor a-d-connecting the semiconductor device to a negative terminal of the energy storing device (2) of the converter, the semiconductor device together with the positive conductor and the negative conductor forming a current path across the energy storing device. The semiconductor switch leg comprises a plurality of magnetic coupling devices 3a-d, each magnetic coupling device being arranged between the two current paths of respective two neighbouring semiconductor devices of the plurality of semiconductor devices such that the current path of one of the two semiconductor devices and the current path of the other of the two semiconductor devices pass via the magnetic coupling device, and such that each current path passes via two of said plurality of magnetic coupling devices.

A plurality of drive circuits each drive a corresponding one of a plurality of power semiconductor elements connected in parallel. Each of the drive circuits includes a control command unit, a current detector, a differentiator, and an integrator. The current detector detects a gate current that flows into a gate terminal of a corresponding one of the power semiconductor elements after the control command unit outputs a turn-on command. The differentiator performs time differentiation of the gate current detected by the current detector. The integrator performs time integration of the gate current detected by the current detector. Based on a differential value and an integral value in each of the drive circuits, the determination unit determines whether an overcurrent state occurs or not in any of the plurality of power semiconductor elements.

A hot swap controller circuit includes a comparator and current control circuitry. The comparator is configured to compare voltage across a power transistor controlled by the hot swap controller circuit to a predetermined threshold voltage. The current control circuitry is coupled to the comparator. The current control circuitry is configured to limit current through the power transistor to no higher than a predetermined high current based on the voltage across the transistor being less than the predetermined threshold voltage. The current control circuitry is also configured to limit the current through the transistor to be no higher than a predetermined low current based on the voltage across the transistor being greater than the predetermined threshold voltage. The predetermined high current is greater than the predetermined low current.

An embodiment of a semiconductor device includes a plurality of transistor sections separated from each other and a plurality of diode sections separated from each other. Each transistor section includes an emitter electrode and a collector electrode. Each diode section includes an anode electrode and a cathode electrode. Each transistor section is electrically coupled to a common gate pad. A ratio between an active transistor part and an active diode part of the semiconductor device is adjustable by activating a first number of the transistor sections by selectively contacting the emitter electrodes and the collector electrodes of the first number of transistor sections, and by activating a second number of the diode sections by selectively contacting the anode electrodes and the cathode electrodes of the second number of diode sections.

Disclosed herein are switching or other active field-effect transistor (FET) configurations that implement independently controlled main-auxiliary branch designs. Such designs include a circuit assembly for performing a switching function that includes a branch with a plurality of main FET devices in parallel with a plurality of auxiliary FET devices. The circuit assembly can include a plurality of gate bias networks where each controls one or more of the main FET devices. The circuit assembly includes a second plurality of gate bias networks that each controls one or more of the auxiliary FET devices.

A current flow control device includes a plurality of semiconductor switches disposed between a power source and a load and that are connected in parallel with each other, and the current flow control device being configured to flow of current between the power source and the load by turning on and off the semiconductor switches. The plurality of semiconductor switches include a first semiconductor switch and a second semiconductor switch. The current flow control device includes a driving circuit configured to apply, to the first semiconductor switch, a voltage that is higher than a voltage output from the power source, to turn on the first semiconductor switch, a switch control unit configured to turn on the second semiconductor switch, and a resistor that is connected in series with a terminal on the power source side of the second semiconductor switch, the resistor lowering a voltage applied to the terminal.

A method for rapidly gathering a sub-threshold swing from a thin film transistor is provided. The method includes: electrically connecting an operational amplifier and an anti-exponential component to a source terminal of the thin film transistor; performing a measuring process to the thin film transistor in which the measuring process is inputting multiple values of a gate voltage to a gate terminal, such that multiple values of an output voltage are correspondingly generated from the output terminal of the operational amplifier; and performing a fitting process to the output voltage corresponding to the thin film transistor in which the fitting process is fitting at least two of said multiple values of the output voltage to get the sub-threshold swing.

A control circuit for controlling a data input/output is provided. The control circuit comprises a plurality of control level circuits that include a first control level circuit and a last control level circuit. Each control level circuit has a control element, with a number of control elements of the last control level circuit being greater than a number of control elements of the first control level circuit. Each control element is configured to receive a first control signal and a second control signal, and controls a current for the data input/output depending on the first and second control signals. The control circuit is configured to provide the first control signal to the control elements in a sequence starting at the first control level circuit and ending at the last control level circuit, and then to provide the second control signal to the last control level circuit in reverse order.