A control circuit of a power conversion apparatus is provided with a switch driving unit that drives the upper and lower arm switches; a short circuit control unit that causes the switch driving unit to execute a short circuit control when a failure occurs in the system, the short circuit control turning an ON side switch to an ON state and turning an OFF side switch to an OFF state; a checking unit that executes a checking process to check whether the short circuit control is able to perform correctly; and a protection control unit that causes the switch driving unit to execute a protection control when a failure occurs on either the upper arm switch or the lower arm switch, the protection control turning the switch where the failure occurs to an OFF state. The control circuit enables the protection control during execution of the checking process.

A power chip includes: a first power switch, formed in a wafer region and having a first and a second metal electrodes; a second power switch, formed in the wafer region and having a third and a fourth metal electrodes, wherein the first and second power switches respectively constitute an upper bridge arm and a lower bridge arm of a bridge circuit, and the first and second power switches are alternately arranged; and a metal region, at least including a first metal layer and a second metal layer that are stacked, each metal layer including a first to a third electrodes, and electrodes with the same voltage potential in the metal layers are electrically coupled.

The present invention provides a transmitter including a first variable resistor, a first transistor, a second transistor, a third transistor and a fourth transistor is disclosed. The first variable resistor is coupled between a supply voltage and a first node. A first electrode of the first transistor is coupled to the first node, and a second electrode of the first transistor is coupled to a first output terminal of the transmitter. A first electrode of the second transistor is coupled to the first output terminal of the transmitter, and a second electrode of the second transistor is coupled to a second node. A first electrode of the third/fourth transistor is coupled to the first node, and a second electrode of the third/fourth transistor is coupled to a second output terminal of the transmitter.

A compact RF switch with improved isolation is presented. According to one aspect, the RF switch includes a basic single-pole single-throw (SPST) switch element that includes an inductor in parallel with a series FET transistor. An inductance of the inductor is selected to provide in combination with an off capacitance of the series FET transistor a resonance at a specific frequency of interest. The frequency of interest can be in-band or out-of-band, including the band’s fundamental frequency or a harmonic thereof. According to another aspect, the inductor is conditionally coupled to the series FET transistor via a reduced size FET transistor. Complex RF switches can include a plurality of the SPST switch elements, each tuned to a same or different frequency of interest. According to yet another aspect, SPST switch elements in their OFF states can provide matching to an SPST element in the ON state.

A semiconductor device includes first and second electrodes, a semiconductor part therebetween, and a control electrode between the semiconductor part and the first electrode. The semiconductor part includes first, third and fifth layers of a first conductivity type and second and fourth layers of a second conductivity type. The second layer is provided between the first layer and the first electrode. The third layer is provided between the second layer and the first electrode. The fourth layer and the fifth layer are selectively provided between the first layer and the second electrode. In a method for controlling the semiconductor device, first to third voltages are applied in order to the control electrode while a p-n junction between the first and second layers is biased in a forward direction. The second and third voltages are greater than the first voltage, and the third voltage is less than the second voltage.

A driver circuit drives an output terminal with an input/output voltage using an NMOS transistor and a PMOS transistor. A pre-driver for the NMOS transistor supplied with a drive voltage and receives a data signal referenced to the drive voltage. A pre-driver for the PMOS transistor has a positive supply input connected to the positive supply rail, a negative supply input receiving a second drive voltage equal to the supply voltage minus the drive voltage. A level shifter circuit, shifts the data signal to be referenced between the supply voltage and the second drive voltage. A charge pump circuit for providing second drive voltage, the charge pump circuit driven with a variable switching frequency proportional to a current of the PMOS transistor.

Switching circuits, half-bridge power converters, and methods for operating a switching circuit including a switching transistor coupled to a load. The method includes applying, with a driver, a gate voltage to the switching transistor. The method also includes generating, with a feedback capacitor, a feedback current based on a change in a voltage sensed at a drain terminal of the switching transistor when the switching transistor turns on. The method further includes applying the feedback current to the driver to limit the gate voltage applied to the switching transistor. The method also includes adjusting, with a controller, a switching slew rate of the switching transistor by draining an amount of the feedback current.

A method for controlling an electrical switch using a driver waveform, wherein the driver waveform comprises: a first time period, T.sub.1, associated with a first current, I.sub.G_high; a second time period, T.sub.2, associated with a second current, I.sub.G_low; wherein: the first current of the driver waveform, I.sub.G_high, is larger than the second current of the driver waveform, I.sub.G_low; and the first time period, T.sub.1, has a first duration and the second time period, T.sub.2, has a second duration. The method comprising: determining an optimised first duration by repeatedly modifying the first duration until an overshoot in an output waveform generated by switching the electrical switch using the driver waveform is less than a threshold; determining an optimised second duration based on the optimised first duration; and switching the electrical switch using the optimised first duration and the optimised second duration.

A load control device for controlling power delivered from an alternating-current power source to an electrical load may comprise a controllably conductive device, a control circuit, and an overcurrent protection circuit that is configured to be disabled when the controllably conductive device is non-conductive. The control circuit may be configured to control the controllably conductive device to be non-conductive at the beginning of each half-cycle of the AC power source and to render the controllably conductive device conductive at a firing time during each half-cycle (e.g., using a forward phase-control dimming technique). The overcurrent protection circuit may be configured to render the controllably conductive device non-conductive in the event of an overcurrent condition in the controllably conductive device. The overcurrent protection circuit may be disabled when the controllably conductive device is non-conductive and enabled after the firing time when the controllably conductive device is rendered conductive during each half-cycle.

A semiconductor device includes high-side and low-side switching elements connected in series to form a switching arm, a high-side driver IC for driving the high-side switching element, and, on a chip separate from the high-side switching element, a low-side driver IC for driving the low-side switching element. The driver IC includes a first controller for monitoring a switching voltage appearing at the node where the high-side and low-side switching elements are connected together. When a first driving control signal fed in from outside the semiconductor device instructs to turn on the high-side switching element, the first controller determines whether or not to permit the high-side switching element to be turned on based on a result of checking the switching voltage.