Patent classifications
H03M13/31
DECODING DEVICE, INFORMATION TRANSMISSION SYSTEM, DECODING METHOD, AND NON-TRANSITORY COMPUTER READABLE MEDIUM
A decoding device receives transmission data obtained by scrambling according to a polynomial x.sup.a+x.sup.b+1 where a and b are each an integer, a>b, and a≠2b. The decoding device includes a receiving unit, an error detecting unit, and a correcting unit. The receiving unit receives data obtained by performing scrambling for a block in which an error correcting code has been added to the transmission data of (n−8) bits where n<a. The error detecting unit calculates, on the basis of a table, an error location in descrambled data obtained by descrambling the received data. The correcting unit corrects the descrambled data at the error location calculated by the error detecting unit.
Polar code encoding method and apparatus, polar code decoding method and apparatus, and device
This application provides a polar code encoding and decoding method and apparatus and a device. An example method includes: sequentially configuring, by a sending device, information bits and first check bits on subchannels in a first subchannel set, and configuring frozen bits on subchannels in a second subchannel set, where the subchannels in the first subchannel set are sorted according to a natural order of serial numbers of the subchannels; and performing polarization encoding on bits on the subchannels to obtain an encoded sequence. In this way, encoding efficiency and decoding efficiency are improved.
Polar code encoding method and apparatus, polar code decoding method and apparatus, and device
This application provides a polar code encoding and decoding method and apparatus and a device. An example method includes: sequentially configuring, by a sending device, information bits and first check bits on subchannels in a first subchannel set, and configuring frozen bits on subchannels in a second subchannel set, where the subchannels in the first subchannel set are sorted according to a natural order of serial numbers of the subchannels; and performing polarization encoding on bits on the subchannels to obtain an encoded sequence. In this way, encoding efficiency and decoding efficiency are improved.
Methods and systems for high bandwidth communications interface
A pair of ground planes arranged in parallel, a dielectric medium disposed in between the pair of ground planes, and a set of at least four signal conductors disposed in the dielectric medium, the set of at least four signal conductors having (i) a first pair of signal conductors arranged proximate to a first ground plane of the pair of ground planes and (ii) a second pair of signal conductors arranged proximate to a second ground plane of the pair of ground planes, each signal conductor of the set of at least four signal conductors configured to carry a respective signal corresponding to a symbol of a codeword of a vector signaling code.
Algebraic decoding method and decoder for (n,n(n-1),n-1)-PGC in communication modulation system
The disclosure discloses an algebraic decoding method and a decoder for a (n, n(n−1), n−1) permutation group code in a communication modulation system. The basic principle of the decoding method is: assuming that two code elements p(r.sub.1)=s.sub.1 and p(r.sub.2)=s.sub.2 can be correctly detected in a received real vector with a length of n, including their element values s.sub.1, s.sub.2 and position indices r.sub.1, r.sub.2 in the vector, an intermediate parameter w is determined by solving an equation (r.sub.1−r.sub.2)w=(s.sub.1−s.sub.2)(mod n); and each code element is calculated by w according to p(i)=(s.sub.1+(n−r.sub.1+i)w)(mod n), i=1, 2, . . . , n. The decoder is mainly composed of multiple n-dimensional registers, a w calculator, n code element calculators, and a code element buffer. In the disclosure, in a case where a receiver only correctly detects two code elements in a transmitted codeword with a length of n, the codeword can be correctly decoded by using the received information of the two code elements.
Load Balanced Decoder Systems And Methods
A decoding circuit system includes a load balancing scheduler circuit, a full range decoder circuit, and an auxiliary decoder circuit. The load balancing scheduler circuit provides codewords that each have a lifting factor greater than a predefined value to the full range decoder circuit. The full range decoder circuit decodes the codewords that each have a lifting factor greater than the predefined value to generate first decoded output data. The load balancing scheduler circuit provides codewords that each have a lifting factor less than the predefined value to the auxiliary decoder circuit. The auxiliary decoder circuit decodes the codewords that each have a lifting factor less than the predefined value to generate second decoded output data.
Load Balanced Decoder Systems And Methods
A decoding circuit system includes a load balancing scheduler circuit, a full range decoder circuit, and an auxiliary decoder circuit. The load balancing scheduler circuit provides codewords that each have a lifting factor greater than a predefined value to the full range decoder circuit. The full range decoder circuit decodes the codewords that each have a lifting factor greater than the predefined value to generate first decoded output data. The load balancing scheduler circuit provides codewords that each have a lifting factor less than the predefined value to the auxiliary decoder circuit. The auxiliary decoder circuit decodes the codewords that each have a lifting factor less than the predefined value to generate second decoded output data.
Error correction method, error correction circuit and electronic device applying the same
An error correction method comprises: when a decoder determines that an input analog code is at a forbidden state, setting a digital binary code as a first predetermined code and inputting the digital binary code to an ECC engine; determining whether the digital binary code has no error or two errors; when the digital binary code has no error, outputting the digital binary code after ECC by the ECC engine; when the digital binary code has two errors, resetting the digital binary code as a second predetermined code and inputting the digital binary code to the ECC engine for ECC; and when the decoder determines that the input analog code is not at the forbidden state, decoding the input analog code into the digital binary code and inputting the digital binary code to the ECC engine for ECC.
Methods, computer programs, devices, and encoders for signal error correction
A method for signal error correction of a position signal relating to a relative position of at least one sensor with respect to a reference, includes determining a set of parameter values of a parameterized approximation of a corrected relative position with respect to time based on measurements of the position signal over a duration of at least one period of a periodic signal error of the position signal. The method further includes estimating a first corrected relative position at a first time based on the parameterized approximation using the determined set of parameter values and the first time.
Methods, computer programs, devices, and encoders for signal error correction
A method for signal error correction of a position signal relating to a relative position of at least one sensor with respect to a reference, includes determining a set of parameter values of a parameterized approximation of a corrected relative position with respect to time based on measurements of the position signal over a duration of at least one period of a periodic signal error of the position signal. The method further includes estimating a first corrected relative position at a first time based on the parameterized approximation using the determined set of parameter values and the first time.