Patent classifications
H04L21/02
Inductor structure and fabricating method thereof
The present disclosure relates to inductor structures and fabricating methods. One example inductor structure includes a first magnetic material layer, an insulation layer, where the insulation layer comprises a polymer structure with longitudinal length which greater than lateral length, the polymer structure comprises an arched upper surface, a first side surface, a second side surface, a bottom surface in a longitudinal direction, at least one of a corner between the arched upper surface and the first side surface and a corner between the arched upper surface and the second side surface is a rounded corner, and at least one of an angle formed between the first side surface and the bottom surface and an angle formed between the second side surface and the bottom surface is less than 90 degree, at least one conductive wire structure passing through the insulation layer, and a second magnetic material layer.
Method for preparing composite membrane
Disclosed is a technology relating to a method for fabricating a multilayer structure. In the method for fabricating the multilayer structure according to the disclosed embodiment, a first material layer including at least one atomic layer is deposited using a first source gas, which includes a first component, and an oxygen-containing reactive gas which is reactive with the first source gas. On the first material layer, a second material layer including at least one atomic layer is deposited using a second source gas, which includes a second component different from the first component, and an oxygen-containing reactive gas which is reactive with the second source gas. The step of depositing the first material layer and the step of depositing the second material layer constitute one cycle, and the cycle is performed at least once.
Methods used in forming an array of memory cells
In some embodiments, a method used in forming an array of memory cells comprises uses no more than two photolithographic masking steps are used in forming both: (a) sense lines longitudinally extending in a column direction that are individually directly above and electrically coupled to the upper source/drain regions of multiple of the second pedestals in the column direction; and (b) spaced elevationally-extending vias laterally between immediately-adjacent of the sense lines directly above and electrically coupled to the upper source/drain regions of multiple of the first pedestals. Other embodiments are disclosed.
Inductor Structure And Fabricating Method Thereof
An inductor structure and fabricating method is provided. The inductor structure includes a first magnetic material layer; an insulation layer, wherein the insulation layer comprises a polymer structure with longitudinal length which greater than lateral length, the polymer structure comprises an arched upper surface, a first side surface, a second side surface, a bottom surface in a longitudinal direction, wherein at least one of a corner between the arched upper surface and the first side surface and a corner between the arched upper surface and the second side surface is a rounded corner, and at least one of an angle formed between the first side surface and the bottom surface and an angle formed between the second side surface and the bottom surface is less than 90 degree; at least one conductive wire structure, passing through the insulation layer; and a second magnetic material layer.
Method for producing a nitride compound semiconductor device
A method for procuring a nitride compound semiconductor device is disclosed. In an embodiment the method includes growing a first nitride compound semiconductor layer onto a growth substrate, depositing a masking layer, growing a second nitride compound semiconductor layer onto the masking layer, growing a third nitride compound semiconductor layer onto the second nitride compound semiconductor layer such that the third nitride compound semiconductor layer has non-planar structures and growing a fourth nitride compound semiconductor layer onto the non-planar structures such that the fourth nitride compound semiconductor layer has an essentially planar surface. The method further includes growing a functional layer sequence of the nitride compound semiconductor device, connecting a side of the functional layer sequence located opposite to the growth substrate to a carrier and removing the growth substrate.