H05K3/0094

METHOD FOR MANUFACTURING WIRING SUBSTRATE

A method for manufacturing a wiring substrate includes preparing a substrate including an insulating layer and metal foils, forming a through hole in the substrate to penetrate through the insulating layer and foils, forming a first plating film on the substrate such that the first film is formed on the entire surface of each metal foil and the inner wall of the hole, laminating one or more resin sheets on the first film such that the resin sheet or sheets cover the first film on the entire surface of a respective one of the foils, pressing the resin sheet or sheets such that resin is extruded from the resin sheet or sheets into the hole and fills space surrounded by the first film inside the hole, removing the resin sheet or sheets, and forming a second plating film on the substrate to cover surface of the resin in the hole.

COAXIAL VIA SHIELDED INTERPOSER
20230063808 · 2023-03-02 ·

A coaxial interposer may shield certain signals (e.g., noisy signals, high speed signals, radio frequency (RF) signals) transmitted through an electronic device. The coaxial interposer may include a coaxial via that includes an outer barrel of non-conductive material and an inner barrel of non-conductive material separated by a conductive barrel. Further, the outer barrel of non-conductive material may be enclosed by an outer metal coating. The coaxial via serves to internally shield each signals transmitted between layers of a printed circuit board (PCB) within the electronic device.

Partially Filling a Component Carrier Opening in a Controlled Manner

A component carrier includes a layer stack with at least one electrically insulating layer structure and/or at least one electrically conductive layer structure, at least one opening in the layer stack, a first curable dielectric element arranged at least partially on the opening, and a second curable dielectric element arranged adjacent to the first curable dielectric element, so that there is an interface region in between. A part of the first curable dielectric element extends partially into the opening.

Component Carrier With a Via Containing a Hardened Filling Material

A component carrier having a stack with at least one electrically conductive layer structure and at least one electrically insulating layer structure; an opening located at least partially in the stack; and a fill material which is located within the opening. The fill material is a photosensitive material, wherein at least a part of the photosensitive material has undergone a hardening treatment with electromagnetic radiation. A method for manufacturing such a component carrier is further described.

INJECTION MOLDED ARTICLE AND METHOD FOR PRODUCING SAME
20230171878 · 2023-06-01 · ·

An injection molded article is provided with: a flat molded resin body that has a flat rectangular parallelepiped shape and is formed from an injection molded resin; and a base sheet affixed to the surface of the molded resin body. The base sheet has formed therein a first conductive layer on a first surface and a through hole passing through from the first surface to a second surface. The through hole is filled with a conductive material, and a second conductive layer is formed so as to be electrically connected with the first conductive layer via the conductive material with which the through hole is filled. In addition, a sealing material is formed on the first conductive layer so as to cover the through hole. The molded resin body is fixed together with the first surface side of the base sheet so as to cover the sealing material.

Resin multilayer substrate and electronic apparatus

A resin multilayer substrate includes a multilayer body including resin layers and adhesive layers that are laminated, via conductors in the resin layers, and bonding portions in the adhesive layers. The bonding portion is connected to the via conductor. One of the resin layer and the adhesive layer is a gas high-permeable layer having a higher gas permeability than the other one. The bonding portion includes an organic substance, or has a higher void content rate per unit plane sectional area than the via conductor. At least a portion of each of the bonding portions contacts the gas high-permeable layers.

LANDLESS MULTILAYER CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF
20170303397 · 2017-10-19 ·

Provided is a landless multilayer circuit board and a manufacturing method thereof. The manufacturing method includes steps of forming a first circuit on a first substrate, patterning a photoresist layer to form at least one via between the first circuit and a second circuit, forming at least one connecting pillar in the at least one via, removing the photoresist layer, forming a second substrate to cover the at least one connect pillar, and forming the second circuit on the second substrate. The second circuit is connected to the first circuit through the at least one connecting pillar. When the second circuit is formed, the at least one via does not need to be filled, thereby making the second circuit flat.

Through hole filling paste

Through hole filling pastes which include a magnetic powder (A), an epoxy resin (B), and a curing agent (C), in which the magnetic powder (A) is surface-treated with a surface treating agent containing at least one element selected from Si, Al, and Ti, are capable of achieving a cured product excellent in plating adhesion.

WAFER-LEVEL MANUFACTURING METHOD FOR EMBEDDING PASSIVE ELEMENT IN GLASS SUBSTRATE
20170280566 · 2017-09-28 · ·

A wafer-level manufacturing method for embedding a passive element in a glass substrate is disclosed. A highly doped silicon wafer is dry etched to form a highly doped silicon mould wafer, containing highly doped silicon passive component structures mould seated in cavity arrays; a glass wafer is anodically bonded to the highly doped silicon mould wafer in vacuum pressure to seal the cavity arrays; the bonded wafers are heated so that the glass melts and fills gaps in the cavity arrays, annealing and cooling are performed, and a reflowed wafer is formed; the upper glass substrate of the reflowed wafer is grinded and polished to expose the highly doped silicon passives; the passive component structure mould embedded in the glass substrate is fully etched; the blind holes formed in the glass substrates after the passive component structure mould has been etched is filled with copper by electroplating; the highly doped silicon substrate and unetched silicon between the cavity arrays are etched, and several glass substrates embedded with a passive element are obtained; to form electrodes for the passives, a metal adhesion layer is deposited, and a metal conductive layer is electroplated. The process is simple, costs are low, and the prepared passive elements have superior performance.

Laminate structures with hole plugs and methods of forming laminate structures with hole plugs
11246226 · 2022-02-08 · ·

Laminate structures including hole plugs, and methods for forming a hole plug in a laminate structure are provided. A laminate structure may be formed with at least a dielectric layer and a first conductive foil on a first side of the dielectric layer. A blind hole may be formed in the laminate structure extending toward the first conductive foil from a second side of the dielectric layer and at least partially through the dielectric layer, the blind hole including a hole depth to hole diameter aspect ratio of less than ten (10) to one (1). Via fill ink may be disposed in the blind hole, and the via fill ink may be dried and/or cured to form a hole plug.