Provided is a memory device that has a structure suitable for still higher integration while securing production easiness, and includes n memory cell units stacked, on a substrate, in order as first to n-th memory cell units in a first direction. The n memory cell units each include: one or more first electrodes; a plurality of second electrodes each provided to intersect the first electrode; a plurality of memory cells provided at respective intersections of the first electrode and the second electrodes and each coupled to both the first and second electrodes; and one or more lead lines coupled to the first electrode to form one or more coupling parts, which, in (m+1)-th memory cell unit, are located at a position where the coupling parts and m-th memory cell region surrounded by the memory cells in m-th memory cell unit overlap each other in the first direction.

The present disclosure provides a semiconductor structure including a first electrode via, a first electrode on the first electrode via, a magnetic tunneling junction (MTJ) over the first electrode, a second electrode over the MTJ, a first dielectric layer on the first electrode via, a second dielectric layer on the first dielectric layer. The first dielectric layer is a planar layer. A sidewall of the MTJ is in contact with the second dielectric layer, and a bottom surface of the second dielectric layer is higher than a bottom surface of the first electrode.

The present disclosure provides a semiconductor structure having a memory region. The semiconductor structure includes an N.sup.th metal layer in a memory region and a periphery region, the periphery region spanning a wider area than the memory region, a plurality of magnetic tunneling junctions (MTJs) over the N.sup.th metal layer, the plurality of MTJs having at least one of mixed pitches and mixed sizes, a top electrode via over each of the plurality of MTJs; and an (N+M).sup.th metal layer over the plurality of MTJs. A method for manufacturing the semiconductor structure is also disclosed.

Embodiments of magnetic tunnel junction (MTJ) structures discussed herein employ seed layers of one or more layer of chromium (Cr), NiCr, NiFeCr, RuCr, IrCr, or CoCr, or combinations thereof. These seed layers are used in combination with one or more pinning layers, a first pinning layer in contact with the seed layer can contain a single layer of cobalt, or can contain cobalt in combination with bilayers of cobalt and platinum (Pt), iridium (Ir), nickel (Ni), or palladium (Pd), The second pinning layer can be the same composition and configuration as the first, or can be of a different composition or configuration. The MTJ stacks discussed herein maintain desirable magnetic properties subsequent to high temperature annealing.

A method includes: providing a modulation circuit, determined an operation mode of a memory array, providing a first voltage corresponding to a positive temperature coefficient in response to a read operation of the memory array, and providing a second voltage corresponding to a negative temperature coefficient in response to a write operation of the memory array. The modulation circuit is configured to generate a temperature-dependent voltage and provide the same to the memory array.

Disclosed is a three-dimensional magnetic device based on a spin Hall effect which includes an internal electrode, at least one magnetic junction and at least one external electrode. The internal electrode, the at least one magnetic junction and the at least one external electrode have columnar structures. Each of the at least one magnetic junction comprises a magnetic free layer, a magnetic reference layer and a non-magnetic spacing layer between magnetic free layer and magnetic reference layer. The magnetic free layer is in contact with internal electrode, and the magnetic reference layer in each of the at least one magnetic junction is in contact with a corresponding one of the at least one external electrode. The three-dimensional magnetic device may be stacked in a normal direction of the bottom surface of the internal electrode. Magnetization reversal of three-dimensional magnetic device may be realized by a combination of a spin-orbit torque and a spin transfer torque. The magnetic device has advantages of reduced heating, improved reliability and stability, high storage density while ensuring thermal stability.

A perpendicular magnetoresistive element includes a novel buffer layer having rocksalt crystal structure interfacing to a CoFeB-based recording tri-layer has (100) plane parallel to the substrate plane and with {110} lattice parameter being slightly larger than the bcc CoFe lattice parameter along {100} direction, and crystallization process of amorphous CoFeB material in the recording layer during thermal annealing leads to form bcc CoFe grains having epitaxial growth with in-plane expansion and out-of-plane contraction. Accordingly, a perpendicular anisotropy, as well as a perpendicular magnetization, is induced in the recording layer. The invention preferably includes materials, configurations and processes of perpendicular magnetoresistive elements suitable for perpendicular spin-transfer torque MRAM applications.

According to one embodiment, a magnetic memory device includes a first insulating region, a first counter insulating region, a first conductive member, and a first magnetic element. The first conductive member is provided between the first insulating region and the first counter insulating region. The first conductive member extends in a first direction crossing a second direction. The second direction is from the first insulating region toward the first counter insulating region. The first magnetic element is provided between the first insulating region and the first counter insulating region. A third direction from the first conductive member toward the first magnetic element crosses a plane including the first and second directions. A portion of a first insulating side surface of the first insulating region opposes the first conductive member. A portion of a first counter insulating side surface of the first counter insulating region opposes the first conductive member.

Provided are embodiments for a semiconductor device that includes a bottom contact; a multi-layer bottom electrode formed over the bottom contact; a magnetic tunnel junction stack formed over the multi-layer bottom electrode; and a top electrode formed over the magnetic tunnel junction stack. Also provided are embodiments for forming the semiconductor device described herein.

A magnetoresistive element comprises a perpendicular coupling layer between a novel perpendicular AFM layer and ferromagnetic recording layer. The perpendicular coupling layer introduces giant magnetic anisotropy energies (P-MAE) on the recording layer interface and the P-AFM layer interface which further introduce RKKY coupling between the magnetic moment of the recording layer and the P-MAE induced magnetic moment at the P-AFM layer interface, yielding a giant perpendicular magnetic anisotropy of the recording layer.