Disclosed is a logic circuit using three-dimensionally stacked dual-gate thin-film transistors, including a substrate, a first dual-gate thin-film transistor on the substrate, a second dual-gate thin-film transistor on the first dual-gate thin-film transistor, and a third dual-gate thin-film transistor on the second dual-gate thin-film transistor, wherein the first dual-gate thin-film transistor, the second dual-gate thin-film transistor and the third dual-gate thin-film transistor are electrically connected to each other. The logic circuit of the invention is configured such that dual-gate thin-film transistors are three-dimensionally stacked, whereby the advantages of the dual-gate structure and of thin-film transistors can be exhibited together and the degree of integration can be drastically increased, and a logic gate is made in the area of a single transistor, thereby remarkably simplifying wire and circuit designs.

An image sensor includes a substrate which includes a first surface and a light-incident second surface facing the first surface, a first semiconductor photoelectric conversion element inside the substrate, an organic photoelectric conversion element on the second surface of the substrate, a first floating diffusion region on the first surface of the substrate, a first transfer transistor having a first end connected to the first semiconductor photoelectric conversion element and a second end connected to the first floating diffusion region, and a second transfer transistor having a first end connected to the organic photoelectric conversion element and a second end connected to the first floating diffusion region. The first semiconductor photoelectric conversion element, the first floating diffusion region, and the first transfer transistor and the second transfer transistor may be in a first pixel region of the substrate.

A semiconductor apparatus includes a plurality of semiconductor devices. The semiconductor devices each include a ferroelectric layer, a conductive metal oxide layer, and a semiconductor layer, between two electrodes. The conductive metal oxide layer may be between the ferroelectric layer and the semiconductor layer. The ferroelectric layer, the conductive metal oxide layer, and the semiconductor layer may all include a metal oxide. The conductive metal oxide layer may include one or more materials selected from the group consisting of an indium oxide, a zinc oxide, a tin oxide, and any combination thereof.

An organic image sensor may be configured to obtain a color signal associated with a particular wavelength spectrum of light absorbed by the organic image sensor may omit a color filter. The organic image sensor may include an organic photoelectric conversion layer including a first material and a second material. The first material may absorb a first wavelength spectrum of light, and the second material may absorb a second wavelength spectrum of light. The organic photoelectric conversion layer may include stacked upper and lower layers, and the respective material compositions of the lower and upper layers may be first and second mixtures of the first and second materials. A ratio of the first material to the second material in the first mixture may be greater than 1/1, and a ratio of the first material to the second material in the second mixture may be less than 1/1.

A solid-state imaging apparatus includes a pixel array part having a plurality of pixels are two-dimensionally arranged, in which each pixel has a first photoelectric conversion region formed above a semiconductor layer, a second photoelectric conversion region formed in the semiconductor layer, a first filter configured to transmit a light in a predetermined wavelength region corresponding to a color component, and a second filter having different transmission characteristics from the first filter, one photoelectric conversion region out of the first photoelectric conversion region and the second photoelectric conversion region photoelectrically converts a light in a visible light region, the other photoelectric conversion region photoelectrically converts a light in an infrared region, the first filter is formed above the first photoelectric conversion region, and the second filter has transmission characteristics of making wavelengths of light in an infrared region absorbed in the other photoelectric conversion region formed below the first filter the same.

A semiconductor device includes first and second select lines, first and second vertical pillars, and first and second subsidiary lines. The select lines are spaced apart and include a first separating insulation layer therebetween. Each of the first and second vertical pillars is connected to a corresponding one of the first or second select lines. The first vertical pillars are closer to the first separating insulation layer. The second vertical pillars arranged in an oblique direction from the first vertical pillars. Each of the first subsidiary lines connects a pair of the first vertical pillars. Each of the second subsidiary lines connects a pair of the second vertical pillars adjacent. The first and second subsidiary lines are alternately disposed along a first direction, and ends of the first and second subsidiary lines are aligned along the first direction.

A solid-state imaging apparatus includes a pixel array part in which a plurality of pixels are two-dimensionally arranged, in which each pixel has a first photoelectric conversion region formed above a semiconductor layer, a second photoelectric conversion region formed in the semiconductor layer, a first filter configured to transmit a light in a predetermined wavelength region corresponding to a color component, and a second filter having different transmission characteristics from the first filter, one photoelectric conversion region out of the first photoelectric conversion region and the second photoelectric conversion region photoelectrically converts a light in a visible light region, the other photoelectric conversion region photoelectrically converts a light in an infrared region, the first filter is formed above the first photoelectric conversion region, and the second filter has transmission characteristics of making wavelengths of lights in an infrared region absorbed in the other photoelectric conversion region formed below the first filter the same.

A lanthanum compound, a method of synthesizing a thin film, and a method of manufacturing an integrated circuit device, the compound being represented by Formula 1 below,

##STR00001## wherein, in Formula 1, R.sup.1 is a hydrogen atom or a C1-C4 linear or branched alkyl group, R.sup.2 and R.sup.3 are each independently a hydrogen atom or a C1-C5 linear or branched alkyl group, at least one of R.sup.2 and R.sup.3 being a C3-C5 branched alkyl group, and R.sup.4 is a hydrogen atom or a C1-C4 linear or branched alkyl group.

Some embodiments of the invention provide a three-dimensional (3D) circuit that is formed by vertically stacking two or more integrated circuit (IC) dies to at least partially overlap. In this arrangement, several circuit blocks defined on each die (1) overlap with other circuit blocks defined on one or more other dies, and (2) electrically connect to these other circuit blocks through connections that cross one or more bonding layers that bond one or more pairs of dies. In some embodiments, the overlapping, connected circuit block pairs include pairs of computation blocks and pairs of computation and memory blocks. The connections that cross bonding layers to electrically connect circuit blocks on different dies are referred to below as z-axis wiring or connections. This is because these connections traverse completely or mostly in the z-axis of the 3D circuit, with the x-y axes of the 3D circuit defining the planar surface of the IC die substrate or interconnect layers. These connections are also referred to as vertical connections to differentiate them from the horizontal planar connections along the interconnect layers of the IC dies.

A method for making a metal oxide semiconductor carbon nanotube thin film transistor circuit. A p-type carbon nanotube thin film transistor and a n-type carbon nanotube thin film transistor are formed on an insulating substrate and stacked with each other. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other.