The invention provides a suitable method and an appropriate, PV film structure. This aim is achieved by a room temperature method in which aqueous dispersions are printed onto a substrate and cured by an accompanying reaction. The accompanying reaction forms gradients and also nanoscale structures at the film boundaries, which produce a PV active film having standard performance and a higher stability. At around 10% efficiency, stability and no initial loss in performance in the climatic chamber test can be obtained and over a 20 year test period, consistently less fluctuation can be achieved. The method is free from tempering or sintering steps, enables the use of technically pure, advantageous starting materials and makes the PV film structure available as a finished, highly flexible cell for a fraction of the typical investment in production or distribution.

Systems and methods for fabricating an OLED are provided, which include dispensing a substrate material onto a substrate carrier, the substrate carrier being rotated by one or more drums, curing the substrate material to form a substrate, depositing at least one OLED onto the substrate, and separating the substrate from the substrate carrier.

A method of fabricating a perovskite light emitting device is provided. In one embodiment, the method comprises the steps of: providing a substrate; providing a first electrode disposed over the substrate; providing a bank structure disposed over the substrate, wherein the bank structure is patterned so as to define at least one sub-pixel on the substrate; providing a first transport layer ink, wherein the first transport layer ink comprises at least one solvent and at least one first charge transport material mixed in the at least one solvent; depositing the first transport layer ink into the at least one sub-pixel over the first electrode using a method of inkjet printing; vacuum drying the first transport layer ink inside a vacuum drying chamber to assemble a first transport layer over the first electrode in the at least one sub-pixel; annealing the first transport layer; providing a perovskite ink, wherein the perovskite ink comprises at least one solvent and at least one perovskite light emitting material mixed in the at least one solvent; depositing the perovskite ink into the at least one sub-pixel over the first transport layer using a method of inkjet printing; vacuum drying the perovskite ink inside a vacuum drying chamber to assemble a perovskite emissive layer over the first transport layer in the at least one sub-pixel; annealing the perovskite emissive layer; and depositing a second electrode over the perovskite emissive layer using a method of vapour deposition. Perovskite light emitting devices and displays fabricated using the provided method are also provided.

Sulfur-fused perylene diimides (PDIs) having the formula 2PDI-nS, wherein n is an integer. Such sulfur-fused PDIs (e.g., 2PDI-2S, 2PDI-3S, and 2PDI-4S) are incorporated as electron acceptors in an active region of a bulk heterojunction solar cell and/or as an electron transport layer. Example solar cells exhibit a power conversion efficiency above 5% and a fill factor above 70% (a record high for non-fullerene bulk heterojunction solar cell devices) when 2PDI-nS is used as the electron acceptor. In addition, the solar cells exhibit low open circuit voltage (V.sub.oc) loss.

An organic substrate and method of making with optimal thermal warp characteristics is disclosed. The organic substrate has one or more top layers and one or more bottom layers. A chip footprint region is a surface region on each of the top and bottom layers that is defined as the projection of one or more semiconductor chips (chips) on the surface of each of the top and bottom layers. One or more top removal patterns are located on and may or may not remove material from the surface of one or more of the top layers within the chip footprint region of the respective top layer. One or more bottom removal patterns are located on and remove material from the surface of one or more of the bottom layers outside the chip footprint region of the respective bottom layer. The removal of the material from one or more of the top layers and/or bottom layers changes and optimizes a thermal warp of the organic substrate. In some embodiments, a Shape Inversion Temperature (SIT) of the substrate is made equal to or above a reflow temperature.

The present invention discloses a thin-film light-emitting device including a charge generating junction layer and a method of fabricating the thin-film light-emitting device. The thin-film light-emitting device including a charge generating junction layer according to one embodiment of the present invention includes a negative electrode; at least one light-emitting unit formed on the negative electrode and including a charge generating junction layer, an electron injection/transport layer, a thin-film light-emitting layer, and a hole injection/transport layer in a sequential order; and a negative electrode formed on the light-emitting unit. In the thin-film light-emitting device of the present invention, the charge generating junction layer has a layer-by-layer structure in which a p-type semiconductor layer and an n-type semiconductor layer are formed, and the concentration of oxygen vacancies at the interface between the p-type and n-type semiconductor layers is adjusted by annealing the n-type semiconductor layer.

The present invention is directed to process for preparing a device comprising a first layer and a first electrode, the method comprising forming the first layer over a first electrode by applying a liquid anhydrous composition comprising at least one metal oxo alkoxide and at least one solvent, onto a surface, the surface being selected from the surface of the first electrode or the surface of a layer being located over the first electrode, optionally drying the composition, and converting the composition to a metal oxide-containing first layer, and forming a second electrode over the first device layer, wherein the method further includes forming a layer comprising quantum dots over the first electrode before or after the formation of the first layer and to the device itself.

An imaging element according to an embodiment of the present disclosure includes: a first electrode and a second electrode facing each other; and a photoelectric conversion layer including a p-type semiconductor and an n-type semiconductor, and provided between the first electrode and the second electrode, in which the photoelectric conversion layer has an exciton charge separation rate of 1×10.sup.10 s.sup.−1 to 1×10.sup.16 s.sup.−1 both inclusive in a p-n junction surface formed by the p-type semiconductor and the n-type semiconductors.

A perovskite light-emitting diode and a method of manufacturing the same are provided. The method includes steps of providing a substrate, disposing a first electrode layer, a hole transport layer, and a perovskite precursor liquid layer on the substrate, coating the perovskite precursor liquid layer with a first solvent, performing a first thermal process to form a perovskite prefabricated layer, coating the perovskite prefabricated layer with a second solvent, and performing a second thermal process to form a perovskite light-emitting layer.

The present invention discloses a thin-film light-emitting device including a charge generating junction layer and a method of fabricating the thin-film light-emitting device. The thin-film light-emitting device including a charge generating junction layer according to one embodiment of the present invention includes a negative electrode; at least one light-emitting unit formed on the negative electrode and including a charge generating junction layer, an electron injection/transport layer, a thin-film light-emitting layer, and a hole injection/transport layer in a sequential order; and a negative electrode formed on the light-emitting unit. In the thin-film light-emitting device of the present invention, the charge generating junction layer has a layer-by-layer structure in which a p-type semiconductor layer and an n-type semiconductor layer are formed, and the concentration of oxygen vacancies at the interface between the p-type and n-type semiconductor layers is adjusted by annealing the n-type semiconductor layer.