H10N52/101

HALL EFFECT DEVICE WITH TRENCH ABOUT A MICRON OR GREATER IN DEPTH

In one aspect, a Hall effect device includes an implantation layer; an epitaxial layer located above the implantation layer; a trench filled with a dielectric material and extending from a top surface of the epitaxial layer into the implantation layer and defining an enclosed region; a buried layer the epitaxial layer from the implantation layer within the enclosed region; and a contact pad located on the epitaxial layer. The trench reduces a current from the contact pad from traveling in a lateral direction orthogonal to a vertical direction and enables the current to travel in the vertical direction.

Temperature compensation circuit, corresponding device and method

A compensation circuit receives a sensing signal from a Hall sensor and outputs a compensated Hall sensing signal. The compensation circuit has a gain that is inversely proportional to Hall sensor drift mobility. The compensated Hall sensing signal is temperature-compensated.

Monolithic integrated circuits with multiple types of embedded non-volatile memory devices
10916583 · 2021-02-09 · ·

Circuits are described that use metallization on both sides techniques to integrate two different types of non-volatile embedded memory devices within a single monolithic integrated circuit device. In an embodiment, a monolithic integrated circuit structure is provided that includes a device layer having one or more logic transistors. A front side interconnect layer is provided above the device layer, as seen in a vertical cross-section taken through the monolithic integrated circuit from top to bottom. A back side interconnect layer is provided below the device layer, as seen in the vertical cross-section. A first type of non-volatile memory device is provided in the front side interconnect layer, and a second type of non-volatile memory device different from the first type of non-volatile memory device is provided in the back side interconnect layer. A back side contact may be used to connect the device layer to a back side interconnect layer.

Semiconductor device
10944046 · 2021-03-09 · ·

A semiconductor device includes a semiconductor element, a conductive layer, terminals, and a sealing resin. The conductive layer, containing metal particles, is in contact with the reverse surface and the side surface of the semiconductor element. The terminals are spaced apart from and electrically connected to the semiconductor element. The sealing resin covers the semiconductor element. The conductive layer has an edge located outside of the semiconductor element as viewed in plan. Each terminal includes a top surface, a bottom surface, an inner side surface held in contact with the sealing resin, and the terminal is formed with a dent portion recessed from the bottom surface and the inner side surface. The conductive layer and the bottom surface of each terminal are exposed from a bottom surface of the sealing resin.

INTEGRATED ROTATION ANGLE DETERMINING SENSOR UNIT IN A MEASURING SYSTEM FOR DETERMINING A ROTATION ANGLE

An integrated rotation angle determining sensor unit in a measuring system for determining a rotation angle, comprising a shaft, rotatable around a rotation axis, having a transducer, a first semiconductor layer designed as a die being provided, which has an upper side arranged perpendicularly to the rotation axis and an underside and a first Hall sensor system monolithically formed in the first semiconductor layer, and a second semiconductor layer designed as a die being provided, which has an upper side arranged perpendicularly to the rotation axis and an underside and a second Hall sensor system monolithically formed in the second semiconductor layer, each Hall sensor system including at least one first Hall sensor and a second Hall sensor and a third Hall sensor.

ELECTRICAL CONTACTS FOR LOW DIMENSIONAL MATERIALS
20210043830 · 2021-02-11 · ·

The present invention relates to a method for connecting an electrical contact to a nanomaterial carried by a substrate. At least one layer of soluble lithography resist is provided on the nanomaterial. An opening in the at least one layer of resist exposes a surface portion of the nanomaterial. At least a portion of the exposed surface portion of the nanomaterial is removed to thereby expose the underlying substrate and an edge of the nanomaterial. A metal is deposited on at least the edge of the nanomaterial and the exposed substrate such that the metal forms an electrical contact with the nanomaterial. Removing at least a portion of the soluble lithography resist from the nanomaterial such that at least a portion of the two-dimensional material is exposed.

Spin orbit materials for efficient spin current generation

In one embodiment, a SOT device is provided that replaces a traditional NM layer adjacent to a magnetic layer with a NM layer that is compatible with CMOS technology. The NM layer may include a CMOS-compatible composite (e.g., CuPt) alloy, a TI (e.g., Bi.sub.2Se.sub.3, Bi.sub.xSe.sub.1-x, Bi.sub.1-xSb.sub.x, etc.) or a TI/non-magnetic metal (e.g., Bi.sub.2Se.sub.3/Ag, Bi.sub.xSe.sub.1-x/Ag, Bi.sub.1-xSb.sub.x/Ag, etc.) interface, that provides efficient spin current generation. Spin current may be generated in various manners, including extrinsic SHE, TSS or Rashba effect.

Multi-die integrated current sensor

A current sensor can include a lead frame. The lead frame can include a first lead and a second lead, wherein the first and second leads are coupled together at a first junction region of the lead frame, wherein the current sensor is operable to sense a magnetic field generated by a first current passing through the first junction region. The current sensor can further include a first die disposed proximate to the lead frame. The first die can include a first magnetic field sensing element disposed on a surface of the first die, a first circuit coupled to the first magnetic field sensing element for generating a first signal indicative of a first current, and a first node coupled to the first signal. The current sensor can further include a second die disposed proximate to the lead frame. The second die can include a second magnetic field sensing element disposed on a surface of the second die, a second circuit coupled to the second magnetic field sensing element for generating a second signal indicative of the first current passing through the first junction region or indicative of a second current passing through the lead frame and a second node coupled to the second signal.

Thermoelectric Cooling and Power Generation based on the Quantum Hall Effect
20210091305 · 2021-03-25 ·

A quantum Hall system can be used for extremely efficient thermoelectric cooling and power generation. Such a quantum Hall system can be implemented as a two-dimensional (2D) material that is subject to a quantizing magnetic field and whose opposite ends are electrically and thermally coupled to a heat sink and heat source, respectively. The edges of the 2D material connecting those opposite ends are coupled to respective ohmic contacts. The massive degeneracy and the metallicity of a partially-filled Landau level in the quantum Hall system enable thermoelectric energy conversion with unprecedented efficiency at low temperature. This efficiency occurs because the thermoelectric figure of merit is constant for a transverse thermoelectric device using the =0 quantum Hall state of Dirac materials at charge neutrality. Under these conditions, electron-hole symmetry causes the electrical Hall effect to vanish and the thermoelectric Hall effect to peak.

Process for manufacturing scalable spin-orbit torque (SOT) magnetic memory
10930843 · 2021-02-23 · ·

A method of fabricating a magnetic storage device includes depositing a first conductive material. The method further includes electrically isolating distinct instances of the first conductive material to form a first wire extending along a first direction. The method further includes depositing, on the distinct instances of the first conductive material, a set of device layers. The method further includes electrically isolating distinct instances of the device layers to form spin orbit torque magnetic random access memory (SOT-MRAM) devices positioned on distinct instances of the first conductive material. The method further includes depositing, on the distinct instances of the device layers, a layer of a second conductive material and electrically isolating a plurality of distinct instances of the layer of the second conductive material to form a plurality of second wires extending along a second direction. The second direction is different from the first direction.