H10N60/10

SEMICONDUCTOR-SUPERCONDUCTOR HETEROSTRUCTURE

A device comprising: a portion of semiconductor; a portion of superconductor arranged to a enable a topological phase having a topological gap to be induced in a region of the semiconductor by proximity effect; and a portion of a non-magnetic material comprising an element with atomic number Z greater than or equal to 26, arranged to increase the topological gap in the topological region of the semiconductor.

Balanced Inductive and Capacitive Resonator Coupling for Quantum Computing System
20210065036 · 2021-03-04 ·

Systems and methods for balanced inductive and capacitive coupling for quantum circuits are provided. A quantum circuit can include a qubit structure comprising an inductor and at least a first portion of a qubit capacitor. The quantum circuit can further include a ground, and a second portion of the qubit capacitor coupled to the ground. The quantum circuit can further include a readout resonator configured to measure a state of the qubit structure. The quantum circuit can further include a capacitive coupling between the readout resonator and the qubit structure and an inductive coupling between the readout resonator and the inductor of the qubit structure. A coupling strength of the inductive coupling and a coupling strength of the capacitive coupling can be approximately equal in magnitude.

SYSTEMS AND METHODS FOR QUBIT FABRICATION
20230422635 · 2023-12-28 · ·

A method of fabricating a superconducting-semiconducting stack includes cleaning a surface of a substrate, the substrate comprising a group IV element; depositing an insulating buffer layer onto the substrate, the insulating buffer layer comprising the group IV element; depositing a p-doped layer onto the insulating buffer layer; depositing a diffusion barrier onto the p-doped layer; and processing the superconducting-semiconducting stack through dopant activation.

SUPERCONDUCTING CLOCK CONDITIONING SYSTEM

One example includes a superconducting clock conditioning system. The system includes a plurality of inductive stages. Each of the plurality of inductive stages includes an inductive signal path that includes at least one inductor and a Josephson junction. The superconducting clock conditioning system is configured to receive an input AC clock signal and to output a conditioned AC clock signal having an approximately square-wave characteristic and having a peak amplitude that is less than a peak amplitude of the input AC clock signal.

GRADED PLANAR BUFFER FOR NANOWIRES

A nanowire structure includes a substrate, a graded planar buffer layer, a patterned mask, and a nanowire. The graded planar buffer layer is on the substrate. The patterned mask is on the graded planar buffer layer and includes an opening through which the graded planar buffer layer is exposed. The nanowire is on the graded planar buffer layer in the opening of the patterned mask. A lattice constant of the graded planar buffer layer is between a lattice constant of the substrate and a lattice constant of the nanowire. By providing the graded planar buffer layer, lattice mismatch between the nanowire and the substrate can be reduced or eliminated, thereby improving the quality and performance of the nanowire structure.

Multifunctional Quantum Node Device and Methods

A multifunctional quantum node device involving a semiconductor vacancy qubit structure, a superconductor quantum memory nanowire coupled with a spin state of the semiconductor vacancy qubit structure, and a superconductor qubit logic circuit coupled with the superconductor quantum memory nanowire and the semiconductor vacancy qubit structure, whereby the device is a hybrid device operable as an interface for at least one of computing and quantum-entangled networking.

CONSTRUCTING AND PROGRAMMING QUANTUM HARDWARE FOR QUANTUM ANNEALING PROCESSES
20210004709 · 2021-01-07 ·

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for constructing and programming quantum hardware for quantum annealing processes.

FABRICATION OF A QUANTUM DEVICE

In a masking phase, a first segment of an amorphous mask is formed on an underlying layer of a substrate. The first segment comprises a first set of trenches exposing the underlying layer. In the masking phase, a second segment of the amorphous mask is formed on the underlying layer. The second segment comprises a second set of trenches exposing the underlying layer. The segments are non-overlapping. An open end of one of the first set of trenches faces an open end of one of the second set of trenches, but the ends are separated by a portion of the amorphous mask. In a semiconductor growth phase, semiconductor material is grown, by selective area growth, in the first and second sets of trenches to form first and second sub-networks of nanowires on the underlying layer. The first and second sub-networks of nanowires are joined to form a single nanowire network.

Semiconductor and ferromagnetic insulator heterostructure

A first aspect provides a topological quantum computing device comprising a network of semiconductor-superconductor nanowires, each nanowire comprising a length of semiconductor formed over a substrate and a coating of superconductor formed over at least part of the semiconductor; wherein at least some of the nanowires further comprise a coating of ferromagnetic insulator disposed over at least part of the semiconductor. A second aspect provides a method of fabricating a quantum or spintronic device comprising a heterostructure of semiconductor and ferromagnetic insulator, by: forming a portion of the semiconductor over a substrate in a first vacuum chamber, and growing a coating of the ferromagnetic insulator on the semiconductor by epitaxy in a second vacuum chamber connected to the first vacuum chamber by a vacuum tunnel, wherein the semiconductor comprises InAs and the ferromagnetic insulator comprises EuS.

MICROWAVE DETECTOR
20200363267 · 2020-11-19 ·

A system for detecting microwave power. In some embodiments, the system includes: a first resonator including a graphene-insulating-superconducting junction; a probe signal source, coupled to the first resonator; and a probe signal analyzer. The probe signal analyzer is configured: to measure a change in amplitude or phase of a probe signal received by the probe signal analyzer from the probe signal source, and to infer, from the change in amplitude or phase, a change in microwave power received by the graphene-insulating-superconducting junction.